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Commit b1371d84 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes Ieddbc59e,I328e46b6 into msm-4.14

* changes:
  ARM: dts: msm: Update compatible string for clock_rpmh node on SDMSHRIKE
  clk: qcom: clk-rpmh: Add new entries for the rfclk clocks on SDMSHRIKE
parents f18ca5c2 b020d573
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Qualcomm Technologies, Inc. RPMh Clocks

Required properties:
- compatible:	Must contain "qcom,rpmh-clk-sdm855".
- compatible:	Must contain "qcom,rpmh-clk-sdm855" or
		"qcom,rpmh-clk-sdmshrike".
- #clock-cells:	Must contain 1.
- mboxes:	List of RPMh mailbox phandle and channel identifier tuples.
- mbox-names:	List of names to identify the RPMh mailboxes used.
+1 −1
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@@ -472,7 +472,7 @@
	};

	clock_rpmh: qcom,rpmhclk {
		compatible = "qcom,rpmh-clk-sdm855";
		compatible = "qcom,rpmh-clk-sdmshrike";
		mboxes = <&apps_rsc 0>;
		mbox-names = "apps";
		#clock-cells = <1>;
+36 −1
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/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -294,6 +294,18 @@ DEFINE_CLK_RPMH_VRM(sdm855, rf_clk2, rf_clk2_ao, "rfclka2", &apps_rsc,
DEFINE_CLK_RPMH_VRM(sdm855, rf_clk3, rf_clk3_ao, "rfclka3", &apps_rsc,
		    38400000, CLK_RPMH_APPS_RSC_STATE_MASK,
		    CLK_RPMH_APPS_RSC_AO_STATE_MASK);
DEFINE_CLK_RPMH_VRM(sdmshrike, rf_clk1, rf_clk1_ao, "rfclkd1", &apps_rsc,
		    38400000, CLK_RPMH_APPS_RSC_STATE_MASK,
		    CLK_RPMH_APPS_RSC_AO_STATE_MASK);
DEFINE_CLK_RPMH_VRM(sdmshrike, rf_clk2, rf_clk2_ao, "rfclkd2", &apps_rsc,
		    38400000, CLK_RPMH_APPS_RSC_STATE_MASK,
		    CLK_RPMH_APPS_RSC_AO_STATE_MASK);
DEFINE_CLK_RPMH_VRM(sdmshrike, rf_clk3, rf_clk3_ao, "rfclkd3", &apps_rsc,
		    38400000, CLK_RPMH_APPS_RSC_STATE_MASK,
		    CLK_RPMH_APPS_RSC_AO_STATE_MASK);
DEFINE_CLK_RPMH_VRM(sdmshrike, rf_clk4, rf_clk4_ao, "rfclkd4", &apps_rsc,
		    38400000, CLK_RPMH_APPS_RSC_STATE_MASK,
		    CLK_RPMH_APPS_RSC_AO_STATE_MASK);

static struct clk_hw *sdm855_rpmh_clocks[] = {
	[RPMH_CXO_CLK]		= &sdm855_bi_tcxo.hw,
@@ -315,8 +327,31 @@ static const struct clk_rpmh_desc clk_rpmh_sdm855 = {
	.num_clks = ARRAY_SIZE(sdm855_rpmh_clocks),
};

static struct clk_hw *sdmshrike_rpmh_clocks[] = {
	[RPMH_CXO_CLK]		= &sdm855_bi_tcxo.hw,
	[RPMH_CXO_CLK_A]	= &sdm855_bi_tcxo_ao.hw,
	[RPMH_LN_BB_CLK2]	= &sdm855_ln_bb_clk2.hw,
	[RPMH_LN_BB_CLK2_A]	= &sdm855_ln_bb_clk2_ao.hw,
	[RPMH_LN_BB_CLK3]	= &sdm855_ln_bb_clk3.hw,
	[RPMH_LN_BB_CLK3_A]	= &sdm855_ln_bb_clk3_ao.hw,
	[RPMH_RF_CLK1]		= &sdmshrike_rf_clk1.hw,
	[RPMH_RF_CLK1_A]	= &sdmshrike_rf_clk1_ao.hw,
	[RPMH_RF_CLK2]		= &sdmshrike_rf_clk2.hw,
	[RPMH_RF_CLK2_A]	= &sdmshrike_rf_clk2_ao.hw,
	[RPMH_RF_CLK3]		= &sdmshrike_rf_clk3.hw,
	[RPMH_RF_CLK3_A]	= &sdmshrike_rf_clk3_ao.hw,
	[RPMH_RF_CLK4]		= &sdmshrike_rf_clk4.hw,
	[RPMH_RF_CLK4_A]	= &sdmshrike_rf_clk4_ao.hw,
};

static const struct clk_rpmh_desc clk_rpmh_sdmshrike = {
	.clks = sdmshrike_rpmh_clocks,
	.num_clks = ARRAY_SIZE(sdmshrike_rpmh_clocks),
};

static const struct of_device_id clk_rpmh_match_table[] = {
	{ .compatible = "qcom,rpmh-clk-sdm855", .data = &clk_rpmh_sdm855},
	{ .compatible = "qcom,rpmh-clk-sdmshrike", .data = &clk_rpmh_sdmshrike},
	{ }
};
MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
+3 −1
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/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 * Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 and
@@ -27,5 +27,7 @@
#define RPMH_RF_CLK2_A						9
#define RPMH_RF_CLK3						10
#define RPMH_RF_CLK3_A						11
#define RPMH_RF_CLK4						12
#define RPMH_RF_CLK4_A						13

#endif