Loading arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm855.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -26,8 +26,12 @@ #global-interrupts = <1>; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; clock-names = "gcc_gpu_memnoc_gfx_clk", "gcc_gpu_snoc_dvm_gfx_clk", "gpu_cc_ahb_clk"; #size-cells = <1>; #address-cells = <1>; ranges; Loading Loading
arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm855.dtsi +6 −2 Original line number Diff line number Diff line Loading @@ -26,8 +26,12 @@ #global-interrupts = <1>; qcom,regulator-names = "vdd"; vdd-supply = <&gpu_cx_gdsc>; clock-names = "gcc_gpu_memnoc_gfx_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gcc GCC_GPU_SNOC_DVM_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; clock-names = "gcc_gpu_memnoc_gfx_clk", "gcc_gpu_snoc_dvm_gfx_clk", "gpu_cc_ahb_clk"; #size-cells = <1>; #address-cells = <1>; ranges; Loading