Loading arch/arm64/boot/dts/qcom/sm6150-usb.dtsi +8 −4 Original line number Diff line number Diff line Loading @@ -162,10 +162,12 @@ qcom,phy-clk-scheme = "cml"; qcom,major-rev = <1>; /* USB2PHY gets clock directly from CXO pad * connected to differential pin cxo_core_in_1p8_vdda. */ clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_RX1_USB2_CLKREF_CLK>, <&clock_gcc GCC_AHB2PHY_WEST_CLK>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk"; clock-names = "ref_clk_src", "cfg_ahb_clk"; resets = <&clock_gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; Loading Loading @@ -416,10 +418,12 @@ qcom,major-rev = <1>; qcom,hold-reset; /* USB2PHY gets clock directly from CXO pad * connected to differential pin cxo_core_in_1p8_vdda. */ clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_RX3_USB2_CLKREF_CLK>, <&clock_gcc GCC_AHB2PHY_WEST_CLK>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk"; clock-names = "ref_clk_src", "cfg_ahb_clk"; resets = <&clock_gcc GCC_QUSB2PHY_SEC_BCR>; reset-names = "phy_reset"; Loading drivers/usb/phy/phy-msm-qusb.c +13 −4 Original line number Diff line number Diff line Loading @@ -1016,11 +1016,20 @@ static int qusb_phy_probe(struct platform_device *pdev) if (IS_ERR(qphy->ref_clk_src)) dev_dbg(dev, "clk get failed for ref_clk_src\n"); /* ref_clk is needed only for DIFF_CLK case, hence make it optional. */ if (of_property_match_string(pdev->dev.of_node, "clock-names", "ref_clk") >= 0) { qphy->ref_clk = devm_clk_get(dev, "ref_clk"); if (IS_ERR(qphy->ref_clk)) dev_dbg(dev, "clk get failed for ref_clk\n"); else if (IS_ERR(qphy->ref_clk)) { ret = PTR_ERR(qphy->ref_clk); if (ret != -EPROBE_DEFER) dev_dbg(dev, "clk get failed for ref_clk\n"); return ret; } clk_set_rate(qphy->ref_clk, 19200000); } qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb_clk"); if (IS_ERR(qphy->cfg_ahb_clk)) Loading Loading
arch/arm64/boot/dts/qcom/sm6150-usb.dtsi +8 −4 Original line number Diff line number Diff line Loading @@ -162,10 +162,12 @@ qcom,phy-clk-scheme = "cml"; qcom,major-rev = <1>; /* USB2PHY gets clock directly from CXO pad * connected to differential pin cxo_core_in_1p8_vdda. */ clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_RX1_USB2_CLKREF_CLK>, <&clock_gcc GCC_AHB2PHY_WEST_CLK>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk"; clock-names = "ref_clk_src", "cfg_ahb_clk"; resets = <&clock_gcc GCC_QUSB2PHY_PRIM_BCR>; reset-names = "phy_reset"; Loading Loading @@ -416,10 +418,12 @@ qcom,major-rev = <1>; qcom,hold-reset; /* USB2PHY gets clock directly from CXO pad * connected to differential pin cxo_core_in_1p8_vdda. */ clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_RX3_USB2_CLKREF_CLK>, <&clock_gcc GCC_AHB2PHY_WEST_CLK>; clock-names = "ref_clk_src", "ref_clk", "cfg_ahb_clk"; clock-names = "ref_clk_src", "cfg_ahb_clk"; resets = <&clock_gcc GCC_QUSB2PHY_SEC_BCR>; reset-names = "phy_reset"; Loading
drivers/usb/phy/phy-msm-qusb.c +13 −4 Original line number Diff line number Diff line Loading @@ -1016,11 +1016,20 @@ static int qusb_phy_probe(struct platform_device *pdev) if (IS_ERR(qphy->ref_clk_src)) dev_dbg(dev, "clk get failed for ref_clk_src\n"); /* ref_clk is needed only for DIFF_CLK case, hence make it optional. */ if (of_property_match_string(pdev->dev.of_node, "clock-names", "ref_clk") >= 0) { qphy->ref_clk = devm_clk_get(dev, "ref_clk"); if (IS_ERR(qphy->ref_clk)) dev_dbg(dev, "clk get failed for ref_clk\n"); else if (IS_ERR(qphy->ref_clk)) { ret = PTR_ERR(qphy->ref_clk); if (ret != -EPROBE_DEFER) dev_dbg(dev, "clk get failed for ref_clk\n"); return ret; } clk_set_rate(qphy->ref_clk, 19200000); } qphy->cfg_ahb_clk = devm_clk_get(dev, "cfg_ahb_clk"); if (IS_ERR(qphy->cfg_ahb_clk)) Loading