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Commit 9b781156 authored by Pratham Pratap's avatar Pratham Pratap Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Remove ref_clk for QUSB PHY for SM6150 



This change removes votes for ref_clk for QUSB PHY
since ref_clock is coming from CXO pad and connected
to differential pin cxo_core_in_1p8_vdda.

Change-Id: Ieae0f6889f327380d7b42fd9ef08126aa52c15e9
Signed-off-by: default avatarPratham Pratap <prathampratap@codeaurora.org>
parent 1a9d4c37

arch/arm64/boot/dts/qcom/sm6150-usb.dtsi

+8 −4
Original line number Diff line number Diff line
@@ -162,10 +162,12 @@ 
		qcom,phy-clk-scheme = "cml";

		qcom,major-rev = <1>;



		/* USB2PHY gets clock directly from CXO pad

		 * connected to differential pin cxo_core_in_1p8_vdda.

		 */

		clocks = <&clock_rpmh RPMH_CXO_CLK>,

			<&clock_gcc GCC_RX1_USB2_CLKREF_CLK>,

			<&clock_gcc GCC_AHB2PHY_WEST_CLK>;

		clock-names =  "ref_clk_src", "ref_clk", "cfg_ahb_clk";

		clock-names =  "ref_clk_src", "cfg_ahb_clk";



		resets = <&clock_gcc GCC_QUSB2PHY_PRIM_BCR>;

		reset-names = "phy_reset";
@@ -416,10 +418,12 @@ 
		qcom,major-rev = <1>;

		qcom,hold-reset;



		/* USB2PHY gets clock directly from CXO pad

		 * connected to differential pin cxo_core_in_1p8_vdda.

		 */

		clocks = <&clock_rpmh RPMH_CXO_CLK>,

			<&clock_gcc GCC_RX3_USB2_CLKREF_CLK>,

			<&clock_gcc GCC_AHB2PHY_WEST_CLK>;

		clock-names =  "ref_clk_src", "ref_clk", "cfg_ahb_clk";

		clock-names =  "ref_clk_src", "cfg_ahb_clk";



		resets = <&clock_gcc GCC_QUSB2PHY_SEC_BCR>;

		reset-names = "phy_reset";