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Commit 73505b44 authored by Magnus Damm's avatar Magnus Damm Committed by Paul Mundt
Browse files

sh: intc - rework core code 



This patch reworks the intc core, implementing the following features:

- Support dual priority registers - one set and one clear register
- All 8/16/32 bit register combinations are now supported
- Both single mask and single enable bitmap register are supported
- Add code to set interrupt priority
- Speedup sense and priority configuration code
- Allocate data using bootmem, allows intc data structures to be
  __initdata
- Save memory - allocated memory footprint is smaller than intc
  structures

Signed-off-by: default avatarMagnus Damm <damm@igel.co.jp>
Signed-off-by: default avatarPaul Mundt <lethal@linux-sh.org>
parent 6ef5fb2c

arch/sh/cchips/voyagergx/irq.c

+1 −1
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@ static struct intc_vect vectors[] = { 
};



static struct intc_mask_reg mask_registers[] = {

	{ VOYAGER_INT_MASK, 1, 32, /* "Interrupt Mask", MMIO_base + 0x30 */

	{ VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */

	  { UP, G54, G53, G52, G51, G50, G49, G48,

	    I2C, PW, 0, DMA, PCI, I2S, AC, US,

	    0, 0, U1, U0, CV, MC, S1, S0,

arch/sh/kernel/cpu/irq/intc.c

+327 −211

File changed.

Preview size limit exceeded, changes collapsed.

include/asm-sh/hw_irq.h

+2 −2
Original line number Diff line number Diff line
@@ -75,7 +75,7 @@ struct intc_desc { 
	unsigned int nr_prio_regs;

	struct intc_sense_reg *sense_regs;

	unsigned int nr_sense_regs;

	struct irq_chip chip;

	char *name;

};



#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
@@ -86,7 +86,7 @@ struct intc_desc symbol = { \ 
	_INTC_ARRAY(priorities),					\

	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),			\

	_INTC_ARRAY(sense_regs),					\

	.chip.name = chipname,						\

	chipname,							\

}



void __init register_intc_controller(struct intc_desc *desc);