Merge "msm: ipa: set the property for caching the entries in IOMMU" (f3d98dc6) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/platform/msm/ipa/ipa_v3/ipa.c

+22 −1

Original line number	Original line	Diff line number	Diff line
	@@ -7282,12 +7282,16 @@ static int ipa_smmu_wlan_cb_probe(struct device *dev)
	/* assume this failure is because iommu driver is not ready */		/* assume this failure is because iommu driver is not ready */
	return -EPROBE_DEFER;		return -EPROBE_DEFER;
	}		}

			cb->is_cache_coherent = of_property_read_bool(dev->of_node,
			"dma-coherent");
	cb->valid = true;		cb->valid = true;

	if (of_property_read_bool(dev->of_node, "qcom,smmu-s1-bypass") \|\|		if (of_property_read_bool(dev->of_node, "qcom,smmu-s1-bypass") \|\|
	ipa3_ctx->ipa_config_is_mhi) {		ipa3_ctx->ipa_config_is_mhi) {
	smmu_info.s1_bypass_arr[IPA_SMMU_CB_WLAN] = true;		smmu_info.s1_bypass_arr[IPA_SMMU_CB_WLAN] = true;
	ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_WLAN] = true;		ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_WLAN] = true;
			cb->is_cache_coherent = false;

	if (iommu_domain_set_attr(cb->iommu,		if (iommu_domain_set_attr(cb->iommu,
	DOMAIN_ATTR_S1_BYPASS,		DOMAIN_ATTR_S1_BYPASS,
	@@ -7419,6 +7423,8 @@ static int ipa_smmu_uc_cb_probe(struct device *dev)
	/* assume this failure is because iommu driver is not ready */		/* assume this failure is because iommu driver is not ready */
	return -EPROBE_DEFER;		return -EPROBE_DEFER;
	}		}
			cb->is_cache_coherent = of_property_read_bool(dev->of_node,
			"dma-coherent");
	IPADBG("SMMU mapping created\n");		IPADBG("SMMU mapping created\n");
	cb->valid = true;		cb->valid = true;

	@@ -7428,6 +7434,7 @@ static int ipa_smmu_uc_cb_probe(struct device *dev)
	ipa3_ctx->ipa_config_is_mhi) {		ipa3_ctx->ipa_config_is_mhi) {
	smmu_info.s1_bypass_arr[IPA_SMMU_CB_UC] = true;		smmu_info.s1_bypass_arr[IPA_SMMU_CB_UC] = true;
	ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC] = true;		ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_UC] = true;
			cb->is_cache_coherent = false;

	if (iommu_domain_set_attr(cb->mapping->domain,		if (iommu_domain_set_attr(cb->mapping->domain,
	DOMAIN_ATTR_S1_BYPASS,		DOMAIN_ATTR_S1_BYPASS,
	@@ -7548,6 +7555,8 @@ static int ipa_smmu_ap_cb_probe(struct device *dev)
	}		}
	}		}

			cb->is_cache_coherent = of_property_read_bool(dev->of_node,
			"dma-coherent");
	cb->dev = dev;		cb->dev = dev;
	cb->mapping = arm_iommu_create_mapping(dev->bus,		cb->mapping = arm_iommu_create_mapping(dev->bus,
	cb->va_start, cb->va_size);		cb->va_start, cb->va_size);
	@@ -7563,6 +7572,8 @@ static int ipa_smmu_ap_cb_probe(struct device *dev)
	"qcom,smmu-s1-bypass") \|\| ipa3_ctx->ipa_config_is_mhi) {		"qcom,smmu-s1-bypass") \|\| ipa3_ctx->ipa_config_is_mhi) {
	smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP] = true;		smmu_info.s1_bypass_arr[IPA_SMMU_CB_AP] = true;
	ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP] = true;		ipa3_ctx->s1_bypass_arr[IPA_SMMU_CB_AP] = true;
			cb->is_cache_coherent = false;

	if (iommu_domain_set_attr(cb->mapping->domain,		if (iommu_domain_set_attr(cb->mapping->domain,
	DOMAIN_ATTR_S1_BYPASS,		DOMAIN_ATTR_S1_BYPASS,
	&bypass)) {		&bypass)) {
	@@ -8035,6 +8046,7 @@ int ipa3_iommu_map(struct iommu_domain *domain,
	{		{
	struct ipa_smmu_cb_ctx *ap_cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);		struct ipa_smmu_cb_ctx *ap_cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_AP);
	struct ipa_smmu_cb_ctx *uc_cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_UC);		struct ipa_smmu_cb_ctx *uc_cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_UC);
			struct ipa_smmu_cb_ctx *wlan_cb = ipa3_get_smmu_ctx(IPA_SMMU_CB_WLAN);

	IPADBG_LOW("domain =0x%pK iova 0x%lx\n", domain, iova);		IPADBG_LOW("domain =0x%pK iova 0x%lx\n", domain, iova);
	IPADBG_LOW("paddr =0x%pa size 0x%x\n", &paddr, (u32)size);		IPADBG_LOW("paddr =0x%pa size 0x%x\n", &paddr, (u32)size);
	@@ -8046,20 +8058,29 @@ int ipa3_iommu_map(struct iommu_domain *domain,
	ipa_assert();		ipa_assert();
	return -EFAULT;		return -EFAULT;
	}		}
			if (ap_cb->is_cache_coherent)
			prot \|= IOMMU_CACHE;
	} else if (domain == ipa3_get_wlan_smmu_domain()) {		} else if (domain == ipa3_get_wlan_smmu_domain()) {
	/* wlan is one time map */		/* wlan is one time map */
			if (wlan_cb->is_cache_coherent)
			prot \|= IOMMU_CACHE;
	} else if (domain == ipa3_get_uc_smmu_domain()) {		} else if (domain == ipa3_get_uc_smmu_domain()) {
	if (iova >= uc_cb->va_start && iova < uc_cb->va_end) {		if (iova >= uc_cb->va_start && iova < uc_cb->va_end) {
	IPAERR("iommu uC overlap addr 0x%lx\n", iova);		IPAERR("iommu uC overlap addr 0x%lx\n", iova);
	ipa_assert();		ipa_assert();
	return -EFAULT;		return -EFAULT;
	}		}
			if (uc_cb->is_cache_coherent)
			prot \|= IOMMU_CACHE;
	} else {		} else {
	IPAERR("Unexpected domain 0x%pK\n", domain);		IPAERR("Unexpected domain 0x%pK\n", domain);
	ipa_assert();		ipa_assert();
	return -EFAULT;		return -EFAULT;
	}		}
			/*
			* IOMMU_CACHE is needed in prot to make the entries cachable
			* if cache coherency is enabled in dtsi.
			*/
	return iommu_map(domain, iova, paddr, size, prot);		return iommu_map(domain, iova, paddr, size, prot);
	}		}

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -474,6 +474,7 @@ struct ipa_smmu_cb_ctx {
	u32 va_start;		u32 va_start;
	u32 va_size;		u32 va_size;
	u32 va_end;		u32 va_end;
			bool is_cache_coherent;
	};		};

	/**		/**