Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Skip to content
Commit f2952283 authored by Xiang Li's avatar Xiang Li
Browse files

ARM: dts: msm: Add pcie1~3 support for sa8195p 



Add PCIe1~3 lane support for sa8195p.
PCIe1 is merged with PHY of PCIe2 into a Gen3x4 lane.

Change-Id: Iba7f8fd4ce635a08a77f8a00320fe0ae57739e0a
Signed-off-by: default avatarXiang Li <lixiang@codeaurora.org>
parent fd6491fe
Hide whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment