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Commit ee2cd9ba authored by Diptanshu Jamgade's avatar Diptanshu Jamgade
Browse files

ARM: dts: msm: Enable L3 scaling for CDSP



Update the CPU_CC node to enable the L3 scaling for CDSP.

Change-Id: I4df477a7a6908e86e377efe2fd639b062546cbf7
Signed-off-by: default avatarDiptanshu Jamgade <djamgade@codeaurora.org>
parent ff722117
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+2 −2
Original line number Diff line number Diff line
@@ -13,7 +13,6 @@
#include "skeleton64.dtsi"
#include <dt-bindings/clock/qcom,aop-qmp.h>
#include <dt-bindings/clock/qcom,camcc-atoll.h>
#include <dt-bindings/clock/qcom,cpucc-sm8150.h>
#include <dt-bindings/clock/qcom,dispcc-atoll.h>
#include <dt-bindings/clock/qcom,gcc-atoll.h>
#include <dt-bindings/clock/qcom,gpucc-sdmmagpie.h>
@@ -1719,7 +1718,8 @@
			<0x18325800 0x1400>;
		reg-names = "osm_l3_base", "osm_pwrcl_base",
			"osm_perfcl_base";
		l3-devs = <&cpu0_cpu_l3_lat &cpu6_cpu_l3_lat>;
		l3-devs = <&cpu0_cpu_l3_lat &cpu6_cpu_l3_lat
			   &cdsp_cdsp_l3_lat>;
		#clock-cells = <1>;
	};