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Commit ea010e51 authored by Haojian Zhuang's avatar Haojian Zhuang
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clk: hi3620: add gate clock flag 



Add missing CLK_SET_RATE_PARENT flag for gate clock.

Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@gmail.com>
parent 5e39edd4
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