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Commit e845f1e5 authored by Rahul Sharma's avatar Rahul Sharma
Browse files

ARM: dts: msm: add xo_clk for DP display on sm8150 



During suspend to disk we need to set DP PCLK to xo during
disable. This changes adds an xo_clk entry to DP device tree node.

Change-Id: Id9dd3cf04e273484be4484d20fedd618c9e119a8
Acked-by: default avatarPoojashree Masthi <c_pmasth@qti.qualcomm.com>
Signed-off-by: default avatarRahul Sharma <rahsha@codeaurora.org>
parent 480c3a4e

arch/arm64/boot/dts/qcom/sm8150-sde.dtsi

+3 −2
Original line number Diff line number Diff line
@@ -623,14 +623,15 @@ 
			 <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>;

			 <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,

			 <&clock_rpmh RPMH_CXO_CLK>;

		clock-names = "core_aux_clk", "core_usb_ref_clk_src",

			"core_usb_ref_clk", "core_usb_pipe_clk",

			"link_clk", "link_iface_clk",

			"crypto_clk", "pixel_clk_rcg", "pixel_parent",

			"pixel1_clk_rcg", "pixel1_parent",

			"strm0_pixel_clk", "strm1_pixel_clk",

			"link_clk_rcg";

			"link_clk_rcg", "xo_clk";



		qcom,phy-version = <0x420>;

		qcom,aux-cfg0-settings = [20 00];