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Commit 480c3a4e authored by Rahul Sharma's avatar Rahul Sharma
Browse files

ARM: dts: msm: add link clk rcg entry on sm8150 



During suspend to disk we need to set link clk parent to xo during
disable. This changes adds an link_clk_rcg entry to DP device tree node.

Change-Id: I0ff6e6ee5d8380107e5e19fe3540d56ccb36ec9a
Acked-by: default avatarPoojashree Masthi <c_pmasth@qti.qualcomm.com>
Signed-off-by: default avatarRahul Sharma <rahsha@codeaurora.org>
parent 2e917035

arch/arm64/boot/dts/qcom/sm8150-sde.dtsi

+5 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -622,13 +622,15 @@ 
			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,

			 <&mdss_dp_pll DP_VCO_DIVIDED_CLK_SRC_MUX>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;

			 <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>,

			 <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>;

		clock-names = "core_aux_clk", "core_usb_ref_clk_src",

			"core_usb_ref_clk", "core_usb_pipe_clk",

			"link_clk", "link_iface_clk",

			"crypto_clk", "pixel_clk_rcg", "pixel_parent",

			"pixel1_clk_rcg", "pixel1_parent",

			"strm0_pixel_clk", "strm1_pixel_clk";

			"strm0_pixel_clk", "strm1_pixel_clk",

			"link_clk_rcg";



		qcom,phy-version = <0x420>;

		qcom,aux-cfg0-settings = [20 00];