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Commit dcc81dc1 authored by Saravana Kannan's avatar Saravana Kannan Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Separate out L3 voting for CPU7 in sm8150 



CPU7 needs a different set of tuning than CPUs 4-6 for L3 scaling. Separate
out the L3 voting for CPU7 to allow this.

Change-Id: Ide1b37de24e8af5b50002be7f799423f7c91af14
Signed-off-by: default avatarSaravana Kannan <skannan@codeaurora.org>
parent 73947aa2
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