UPSTREAM: coresight: tmc-etr: Add support for CPU-wide trace scenarios

This patch adds support for CPU-wide trace scenarios by making sure that
only the sources monitoring the same process have access to a common sink.
Because the sink is shared between sources, the first source to use the
sink switches it on while the last one does the cleanup.  Any attempt to
modify the HW is overlooked for as long as more than one source is using
a sink.

Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Tested-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Robert Walker <robert.walker@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

(Upstream commit 8d03cfd16a7283e9e7a5aeb7dc0742ceb66d2d23).

Bug: 140266694
Change-Id: I76ad471591014415efdb3f982013891f5bcfed38
Signed-off-by: Yabin Cui <yabinc@google.com>