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Commit dab4ed2e authored by Jim Wang's avatar Jim Wang Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: update UBWC highest bank bit for sdmshrike display 



Sync up the UBWC highest bank bit for display with the GPU/VIDEO output
setting, especially for 8K mode.

Change-Id: I704ca00bef8bc3cd46b717befd1e5d0508299b49
Signed-off-by: default avatarJim Wang <jimwan@codeaurora.org>
parent bc887246

arch/arm64/boot/dts/qcom/sdmshrike-sde.dtsi

+3 −3
Original line number Diff line number Diff line 
/* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.

/* Copyright (c) 2016-2020, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -141,7 +141,7 @@ 
		qcom,sde-sspp-linewidth = <4096>;

		qcom,sde-wb-linewidth = <4096>;

		qcom,sde-mixer-blendstages = <0xb>;

		qcom,sde-highest-bank-bit = <0x2>;

		qcom,sde-highest-bank-bit = <0x3>;

		qcom,sde-ubwc-version = <0x300>;

		qcom,sde-ubwc-bw-calc-version = <0x1>;

		qcom,sde-panic-per-pipe;
@@ -402,7 +402,7 @@ 
		#list-cells = <1>;



		qcom,mdss-rot-mode = <1>;

		qcom,mdss-highest-bank-bit = <0x2>;

		qcom,mdss-highest-bank-bit = <0x3>;



		/* Bus Scale Settings */

		qcom,msm-bus,name = "mdss_rotator";