perf/core: Add support for PMUs that can be read from more than 1 CPU

Some PMUs events can be read from more than the one CPU. So allow the
PMU driver to mark events as such. For these events, we don't need to
reject reads or make smp calls to the event's CPU (and cause
unnecessary overhead and wake ups).

When a PMU driver marks an event as such, care must be taken by the
driver to make sure they can handle the event being read/updated from
more than 1 CPU at the same time (Eg: due to an IRQ indicating event
counter overflow and another thread trying to read the latest values).

Good examples of such events would be events from caches shared across
CPUs.

Change-Id: I3dad97fc95849e26bd2bb3e418cdb4d47f2e335c
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
[modify to support exclude_idle flag]
Signed-off-by: Jonathan Avila <avilaj@codeaurora.org>