Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit d82dbd43 authored by Govinda Rajulu Chenna's avatar Govinda Rajulu Chenna
Browse files

drm/msm/sde: update peripheral flush bit for dp dsc mode 



Add peripheral flush bit in control path when dsc is active
for dp interfaces. This is required to flush the dp controller
logic to send pps packet in the current active frame transfer.

Change-Id: I82df60ea1fd00c6f68e128ff971553c1e2acee46
Signed-off-by: default avatarGovinda Rajulu Chenna <gchenna@codeaurora.org>
parent 7f16c781

drivers/gpu/drm/msm/sde/sde_encoder_phys_vid.c

+5 −0
Original line number Diff line number Diff line
@@ -875,6 +875,11 @@ static void sde_encoder_phys_vid_enable(struct sde_encoder_phys *phys_enc) 
		ctl->ops.update_bitmask_merge3d(ctl,

			phys_enc->hw_pp->merge_3d->idx, 1);



	if (phys_enc->hw_intf->cap->type == INTF_DP &&

		phys_enc->comp_type == MSM_DISPLAY_COMPRESSION_DSC &&

		phys_enc->comp_ratio && ctl->ops.update_bitmask_periph)

		ctl->ops.update_bitmask_periph(ctl, intf->idx, 1);



skip_flush:

	SDE_DEBUG_VIDENC(vid_enc, "update pending flush ctl %d intf %d\n",

		ctl->idx - CTL_0, intf->idx);