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Commit d2c0f681 authored by Lipsa rout's avatar Lipsa rout Committed by Gerrit - the friendly Code Review server
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drm: msm: dsi-staging: signal pending clock change in case of DMS



A new clock rate is calculated during change of resolution or FPS.
During such a Dynamic Mode Switch, the clock rate change pending
flag needs to be set after it has been calculated,so that the flag
is checked and the clocks are updated accordingly.

Change-Id: Iec102796d5c61d01c567f0b6676e9a6d4ed94268
Signed-off-by: default avatarSatya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Signed-off-by: default avatarLipsa rout <lrout@codeaurora.org>
parent e80972da
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