Merge branch 'omap_fixes_a_3.3rc' of git://git.pwsan.com/linux-2.6 into fixes (cd3a2ba0) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/arm/mach-omap2/io.c

+3 −1

Original line number	Diff line number	Diff line
		@@ -388,7 +388,7 @@ static void __init omap_hwmod_init_postsetup(void)
		omap_pm_if_early_init();
		}

		#ifdef CONFIG_ARCH_OMAP2
		#ifdef CONFIG_SOC_OMAP2420
		void __init omap2420_init_early(void)
		{
		omap2_set_globals_242x();
		@@ -400,7 +400,9 @@ void __init omap2420_init_early(void)
		omap_hwmod_init_postsetup();
		omap2420_clk_init();
		}
		#endif

		#ifdef CONFIG_SOC_OMAP2430
		void __init omap2430_init_early(void)
		{
		omap2_set_globals_243x();

arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c

+0 −21

Original line number	Diff line number	Diff line
		@@ -55,27 +55,6 @@ struct omap_hwmod_class omap2_dss_hwmod_class = {
		.reset = omap_dss_reset,
		};

		/*
		* 'dispc' class
		* display controller
		*/

		static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
		.rev_offs = 0x0000,
		.sysc_offs = 0x0010,
		.syss_offs = 0x0014,
		.sysc_flags = (SYSC_HAS_SIDLEMODE \| SYSC_HAS_MIDLEMODE \|
		SYSC_HAS_SOFTRESET \| SYSC_HAS_AUTOIDLE),
		.idlemodes = (SIDLE_FORCE \| SIDLE_NO \| SIDLE_SMART \|
		MSTANDBY_FORCE \| MSTANDBY_NO \| MSTANDBY_SMART),
		.sysc_fields = &omap_hwmod_sysc_type1,
		};

		struct omap_hwmod_class omap2_dispc_hwmod_class = {
		.name = "dispc",
		.sysc = &omap2_dispc_sysc,
		};

		/*
		* 'rfbi' class
		* remote frame buffer interface

arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c

+22 −0

Original line number	Diff line number	Diff line
		@@ -28,6 +28,28 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = {
		{ .name = "dispc", .dma_req = 5 },
		{ .dma_req = -1 }
		};

		/*
		* 'dispc' class
		* display controller
		*/

		static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = {
		.rev_offs = 0x0000,
		.sysc_offs = 0x0010,
		.syss_offs = 0x0014,
		.sysc_flags = (SYSC_HAS_SIDLEMODE \| SYSC_HAS_MIDLEMODE \|
		SYSC_HAS_SOFTRESET \| SYSC_HAS_AUTOIDLE),
		.idlemodes = (SIDLE_FORCE \| SIDLE_NO \| SIDLE_SMART \|
		MSTANDBY_FORCE \| MSTANDBY_NO \| MSTANDBY_SMART),
		.sysc_fields = &omap_hwmod_sysc_type1,
		};

		struct omap_hwmod_class omap2_dispc_hwmod_class = {
		.name = "dispc",
		.sysc = &omap2_dispc_sysc,
		};

		/* OMAP2xxx Timer Common */
		static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = {
		.rev_offs = 0x0000,

arch/arm/mach-omap2/omap_hwmod_3xxx_data.c

+47 −7

Original line number	Diff line number	Diff line
		@@ -1480,6 +1480,28 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = {
		.masters_cnt = ARRAY_SIZE(omap3xxx_dss_masters),
		};

		/*
		* 'dispc' class
		* display controller
		*/

		static struct omap_hwmod_class_sysconfig omap3_dispc_sysc = {
		.rev_offs = 0x0000,
		.sysc_offs = 0x0010,
		.syss_offs = 0x0014,
		.sysc_flags = (SYSC_HAS_SIDLEMODE \| SYSC_HAS_MIDLEMODE \|
		SYSC_HAS_SOFTRESET \| SYSC_HAS_AUTOIDLE \|
		SYSC_HAS_ENAWAKEUP),
		.idlemodes = (SIDLE_FORCE \| SIDLE_NO \| SIDLE_SMART \|
		MSTANDBY_FORCE \| MSTANDBY_NO \| MSTANDBY_SMART),
		.sysc_fields = &omap_hwmod_sysc_type1,
		};

		static struct omap_hwmod_class omap3_dispc_hwmod_class = {
		.name = "dispc",
		.sysc = &omap3_dispc_sysc,
		};

		/* l4_core -> dss_dispc */
		static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = {
		.master = &omap3xxx_l4_core_hwmod,
		@@ -1503,7 +1525,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = {

		static struct omap_hwmod omap3xxx_dss_dispc_hwmod = {
		.name = "dss_dispc",
		.class = &omap2_dispc_hwmod_class,
		.class = &omap3_dispc_hwmod_class,
		.mpu_irqs = omap2_dispc_irqs,
		.main_clk = "dss1_alwon_fck",
		.prcm = {
		@@ -3523,12 +3545,6 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
		&omap3xxx_uart2_hwmod,
		&omap3xxx_uart3_hwmod,

		/* dss class */
		&omap3xxx_dss_dispc_hwmod,
		&omap3xxx_dss_dsi1_hwmod,
		&omap3xxx_dss_rfbi_hwmod,
		&omap3xxx_dss_venc_hwmod,

		/* i2c class */
		&omap3xxx_i2c1_hwmod,
		&omap3xxx_i2c2_hwmod,
		@@ -3635,6 +3651,15 @@ static __initdata struct omap_hwmod *am35xx_hwmods[] = {
		NULL
		};

		static __initdata struct omap_hwmod *omap3xxx_dss_hwmods[] = {
		/* dss class */
		&omap3xxx_dss_dispc_hwmod,
		&omap3xxx_dss_dsi1_hwmod,
		&omap3xxx_dss_rfbi_hwmod,
		&omap3xxx_dss_venc_hwmod,
		NULL
		};

		int __init omap3xxx_hwmod_init(void)
		{
		int r;
		@@ -3708,6 +3733,21 @@ int __init omap3xxx_hwmod_init(void)

		if (h)
		r = omap_hwmod_register(h);
		if (r < 0)
		return r;

		/*
		* DSS code presumes that dss_core hwmod is handled first,
		* _before_ any other DSS related hwmods so register common
		* DSS hwmods last to ensure that dss_core is already registered.
		* Otherwise some change things may happen, for ex. if dispc
		* is handled before dss_core and DSS is enabled in bootloader
		* DIPSC will be reset with outputs enabled which sometimes leads
		* to unrecoverable L3 error.
		* XXX The long-term fix to this is to ensure modules are set up
		* in dependency order in the hwmod core code.
		*/
		r = omap_hwmod_register(omap3xxx_dss_hwmods);

		return r;
		}

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+2 −0

Original line number	Diff line number	Diff line
		@@ -1031,6 +1031,7 @@ static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = {

		static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = {
		{
		.name = "mpu",
		.pa_start = 0x4012e000,
		.pa_end = 0x4012e07f,
		.flags = ADDR_TYPE_RT
		@@ -1049,6 +1050,7 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = {

		static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = {
		{
		.name = "dma",
		.pa_start = 0x4902e000,
		.pa_end = 0x4902e07f,
		.flags = ADDR_TYPE_RT