dmaengine: dw: fix a typo for bitfields of CTL_LO

The offset of SINC should be 9, not 7, here fix this
typo.

Signed-off-by: Jie Yang <yang.jie@intel.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>