iommu: arm-smmu: Disable io-coherency in bypass mode

The IC attribute from a client transaction is not connected to the
MMU500. Instead, IC is set to OC at the MMU500 input.

This can lead to an error scenario where:
1) Client sends OS=1 OC=1 IC=0 and expects io-coherency to be disabled.
2) Iommu is in bypass mode, and does not override any attributes.
But per the above we get OS=1 IC=OC, which enables io-coherency.

Prevent this by forcing incoming transactions to Non-Shareable when
the iommu is in bypass mode. For non-bypass mode cases, the stage 1
page table entries will provide the cacheability and shareability
attributes.

Change-Id: I41a497aa2a92c8e1291de34a98cad407266f4f17
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>