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Commit c4af3634 authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: add support for frequency scaling for SDM660"

parents 7f1dd142 870ec5ca

arch/arm64/boot/dts/qcom/sdm660.dtsi

+22 −12
Original line number Original line Diff line number Diff line
@@ -919,7 +919,7 @@ 
		BW_OPP_ENTRY(1804, 4); /* 6881 MB/s */

		BW_OPP_ENTRY(1804, 4); /* 6881 MB/s */

	};

	};





	 cpubw: qcom,cpubw {

	 cpu_cpu_ddr_bw: qcom,cpu-cpu-ddr-bw {

		compatible = "qcom,devbw";

		compatible = "qcom,devbw";

		governor = "performance";

		governor = "performance";

		qcom,src-dst-ports =

		qcom,src-dst-ports =
@@ -928,17 +928,18 @@ 
		operating-points-v2 = <&generic_bw_opp_table>;

		operating-points-v2 = <&generic_bw_opp_table>;

	};

	};





	bwmon: qcom,cpu-bwmon {

	cpu_cpu_ddr_bwmon: qcom,cpu-cpu-ddr-bwmon@01008000 {

		compatible = "qcom,bimc-bwmon4";

		compatible = "qcom,bimc-bwmon4";

		reg = <0x01008000 0x300>, <0x01001000 0x200>;

		reg = <0x01008000 0x300>, <0x01001000 0x200>;

		reg-names = "base", "global_base";

		reg-names = "base", "global_base";

		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;

		interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;

		qcom,mport = <0>;

		qcom,mport = <0>;

		qcom,hw-timer-hz = <19200000>;

		qcom,hw-timer-hz = <19200000>;

		qcom,target-dev = <&cpubw>;

		qcom,target-dev = <&cpu_cpu_ddr_bw>;

		qcom,count-unit = <0x10000>;

	};

	};





	mincpubw: qcom,mincpubw {

	cpu0_cpu_ddr_latfloor: qcom,cpu0-cpu-ddr-latfloor {

		compatible = "qcom,devbw";

		compatible = "qcom,devbw";

		governor = "powersave";

		governor = "powersave";

		qcom,src-dst-ports =

		qcom,src-dst-ports =
@@ -947,7 +948,7 @@ 
		operating-points-v2 = <&generic_bw_opp_table>;

		operating-points-v2 = <&generic_bw_opp_table>;

	};

	};





	memlat_cpu0: qcom,memlat-cpu0 {

	cpu4_cpu_ddr_latfloor: qcom,cpu4-cpu-ddr-latfloor {

		compatible = "qcom,devbw";

		compatible = "qcom,devbw";

		governor = "powersave";

		governor = "powersave";

		qcom,src-dst-ports =

		qcom,src-dst-ports =
@@ -956,7 +957,7 @@ 
		operating-points-v2 = <&generic_bw_opp_table>;

		operating-points-v2 = <&generic_bw_opp_table>;

	};

	};





	memlat_cpu4: qcom,memlat-cpu4 {

	cpu0_cpu_ddr_lat: qcom,cpu0-cpu-ddr-lat {

		compatible = "qcom,devbw";

		compatible = "qcom,devbw";

		governor = "powersave";

		governor = "powersave";

		qcom,src-dst-ports =

		qcom,src-dst-ports =
@@ -965,20 +966,29 @@ 
		operating-points-v2 = <&generic_bw_opp_table>;

		operating-points-v2 = <&generic_bw_opp_table>;

	};

	};





	devfreq_memlat_0: qcom,arm-memlat-mon-0 {

	cpu4_cpu_ddr_lat: qcom,cpu4-cpu-ddr-lat {

		compatible = "qcom,devbw";

		governor = "powersave";

		qcom,src-dst-ports =

			<MSM_BUS_MASTER_AMPSS_M0 MSM_BUS_SLAVE_EBI_CH0>;

		qcom,active-only;

		operating-points-v2 = <&generic_bw_opp_table>;

	};



	cpu0_cpu_ddr_latmon: qcom,cpu0-cpu-ddr-latmon {

		compatible = "qcom,arm-memlat-mon";

		compatible = "qcom,arm-memlat-mon";

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,target-dev = <&memlat_cpu0>;

		qcom,target-dev = <&cpu0_cpu_ddr_lat>;

		qcom,core-dev-table =

		qcom,core-dev-table =

			< 902400 MHZ_TO_MBPS(200, 4) >,

			< 902400 MHZ_TO_MBPS(200, 4) >,

			< 1401600 MHZ_TO_MBPS(547, 4) >,

			< 1401600 MHZ_TO_MBPS(547, 4) >,

			< 1881600 MHZ_TO_MBPS(1017, 4) >;

			< 1881600 MHZ_TO_MBPS(1017, 4) >;

	};

	};





	devfreq_memlat_4: qcom,arm-memlat-mon-4 {

	cpu4_cpu_ddr_latmon: qcom,cpu4-cpu-ddr-latmon {

		compatible = "qcom,arm-memlat-mon";

		compatible = "qcom,arm-memlat-mon";

		qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;

		qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;

		qcom,target-dev = <&memlat_cpu4>;

		qcom,target-dev = <&cpu4_cpu_ddr_lat>;

		qcom,core-dev-table =

		qcom,core-dev-table =

			< 1113600 MHZ_TO_MBPS(200, 4) >,

			< 1113600 MHZ_TO_MBPS(200, 4) >,

			< 1401600 MHZ_TO_MBPS(1017, 4) >,

			< 1401600 MHZ_TO_MBPS(1017, 4) >,
@@ -989,7 +999,7 @@ 
	cpu0_computemon: qcom,cpu0-computemon {

	cpu0_computemon: qcom,cpu0-computemon {

		compatible = "qcom,arm-cpu-mon";

		compatible = "qcom,arm-cpu-mon";

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,target-dev = <&mincpubw>;

		qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;

		qcom,core-dev-table =

		qcom,core-dev-table =

				< 633600 MHZ_TO_MBPS(200, 4) >,

				< 633600 MHZ_TO_MBPS(200, 4) >,

				< 1401600 MHZ_TO_MBPS(412, 4) >,

				< 1401600 MHZ_TO_MBPS(412, 4) >,
@@ -999,7 +1009,7 @@ 
	cpu4_computemon: qcom,cpu4-computemon {

	cpu4_computemon: qcom,cpu4-computemon {

		compatible = "qcom,arm-cpu-mon";

		compatible = "qcom,arm-cpu-mon";

		qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;

		qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>;

		qcom,target-dev = <&mincpubw>;

		qcom,target-dev = <&cpu4_cpu_ddr_latfloor>;

		qcom,core-dev-table =

		qcom,core-dev-table =

				< 1113600 MHZ_TO_MBPS(200, 4) >,

				< 1113600 MHZ_TO_MBPS(200, 4) >,

				< 1401600 MHZ_TO_MBPS(547, 4) >,

				< 1401600 MHZ_TO_MBPS(547, 4) >,