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Commit bd6fb762 authored by Bjorn Helgaas's avatar Bjorn Helgaas
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PCI: Add offsets of PCIe capability registers



These offsets are not used, and in some cases are completely reserved
even in the spec, but I'm adding them for completeness just to match
the diagrams in the spec, e.g., PCIe spec r3.0, sec 7.8.

Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent c0b4b381
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