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Commit bbde4eb5 authored by Dilip Kota's avatar Dilip Kota
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ARM: dts: msm: Update SPI maximum frequency for QUP instances on QCS405



BLSP0 QUP2 and BLSP0 QUP3 clock frequencies
are limited to 25Mhz because of timing closure
limitation at hardware level.

Change-Id: Ic45c127df75f8f16607fce5b17692dfe65db1166
Signed-off-by: default avatarDilip Kota <dkota@codeaurora.org>
parent 84932aaa
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