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Commit aabfd316 authored by Govinda Rajulu Chenna's avatar Govinda Rajulu Chenna Committed by Gerrit - the friendly Code Review server
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drm/msm/dp: add mst related resource parsing in dp 



Implement mst specific resource nodes parsing and
update the internal data structures, those are allowed
to access in mst stream based implementation.

CRs-Fixed: 2192818
Change-Id: Ib423225b131177e26ccfe79af01f402df563fbb2
Signed-off-by: default avatarGovinda Rajulu Chenna <gchenna@codeaurora.org>
parent 70883035

drivers/gpu/drm/msm/dp/dp_catalog.c

+3 −0
Original line number Diff line number Diff line
@@ -80,6 +80,7 @@ struct dp_catalog_io { 
	struct dp_io_data *dp_pll;

	struct dp_io_data *usb3_dp_com;

	struct dp_io_data *hdcp_physical;

	struct dp_io_data *dp_p1;

};



/* audio related catalog functions */
@@ -1688,6 +1689,7 @@ static void dp_catalog_get_io_buf(struct dp_catalog_private *catalog) 
	dp_catalog_fill_io_buf(usb3_dp_com);

	dp_catalog_fill_io_buf(dp_mmss_cc);

	dp_catalog_fill_io_buf(hdcp_physical);

	dp_catalog_fill_io_buf(dp_p1);

}



static void dp_catalog_get_io(struct dp_catalog_private *catalog)
@@ -1705,6 +1707,7 @@ static void dp_catalog_get_io(struct dp_catalog_private *catalog) 
	dp_catalog_fill_io(usb3_dp_com);

	dp_catalog_fill_io(dp_mmss_cc);

	dp_catalog_fill_io(hdcp_physical);

	dp_catalog_fill_io(dp_p1);

}



static void dp_catalog_set_exe_mode(struct dp_catalog *dp_catalog, char *mode)

drivers/gpu/drm/msm/dp/dp_catalog_v420.c

+1 −0
Original line number Diff line number Diff line
@@ -53,6 +53,7 @@ struct dp_catalog_io { 
	struct dp_io_data *dp_pll;

	struct dp_io_data *usb3_dp_com;

	struct dp_io_data *hdcp_physical;

	struct dp_io_data *dp_p1;

};



struct dp_catalog_private_v420 {

drivers/gpu/drm/msm/dp/dp_parser.c

+74 −3
Original line number Diff line number Diff line
@@ -426,12 +426,17 @@ static int dp_parser_init_clk_data(struct dp_parser *parser) 
{

	int num_clk = 0, i = 0, rc = 0;

	int core_clk_count = 0, ctrl_clk_count = 0;

	int strm0_clk_count = 0, strm1_clk_count = 0;

	const char *core_clk = "core";

	const char *ctrl_clk = "ctrl";

	const char *strm0_clk = "strm0";

	const char *strm1_clk = "strm1";

	const char *clk_name;

	struct device *dev = &parser->pdev->dev;

	struct dss_module_power *core_power = &parser->mp[DP_CORE_PM];

	struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM];

	struct dss_module_power *strm0_power = &parser->mp[DP_STREAM0_PM];

	struct dss_module_power *strm1_power = &parser->mp[DP_STREAM1_PM];



	num_clk = of_property_count_strings(dev->of_node, "clock-names");

	if (num_clk <= 0) {
@@ -449,6 +454,12 @@ static int dp_parser_init_clk_data(struct dp_parser *parser) 


		if (dp_parser_check_prefix(ctrl_clk, clk_name))

			ctrl_clk_count++;



		if (dp_parser_check_prefix(strm0_clk, clk_name))

			strm0_clk_count++;



		if (dp_parser_check_prefix(strm1_clk, clk_name))

			strm1_clk_count++;

	}



	/* Initialize the CORE power module */
@@ -484,8 +495,42 @@ static int dp_parser_init_clk_data(struct dp_parser *parser) 
		goto ctrl_clock_error;

	}



	/* Initialize the STREAM0 power module */

	if (strm0_clk_count <= 0) {

		pr_debug("no strm0 clocks are defined\n");

	} else {

		strm0_power->num_clk = strm0_clk_count;

		strm0_power->clk_config = devm_kzalloc(dev,

			sizeof(struct dss_clk) * strm0_power->num_clk,

			GFP_KERNEL);

		if (!strm0_power->clk_config) {

			strm0_power->num_clk = 0;

			rc = -EINVAL;

			goto strm0_clock_error;

		}

	}



	/* Initialize the STREAM1 power module */

	if (strm1_clk_count <= 0) {

		pr_debug("no strm1 clocks are defined\n");

	} else {

		strm1_power->num_clk = strm1_clk_count;

		strm1_power->clk_config = devm_kzalloc(dev,

			sizeof(struct dss_clk) * strm1_power->num_clk,

			GFP_KERNEL);

		if (!strm1_power->clk_config) {

			strm1_power->num_clk = 0;

			rc = -EINVAL;

			goto strm1_clock_error;

		}

	}



	return rc;



strm1_clock_error:

	dp_parser_put_clk_data(dev, strm0_power);

strm0_clock_error:

	dp_parser_put_clk_data(dev, ctrl_power);

ctrl_clock_error:

	dp_parser_put_clk_data(dev, core_power);

exit:
@@ -498,15 +543,23 @@ static int dp_parser_clock(struct dp_parser *parser) 
	int num_clk = 0;

	int core_clk_index = 0, ctrl_clk_index = 0;

	int core_clk_count = 0, ctrl_clk_count = 0;

	int strm0_clk_index = 0, strm1_clk_index = 0;

	int strm0_clk_count = 0, strm1_clk_count = 0;

	const char *clk_name;

	const char *core_clk = "core";

	const char *ctrl_clk = "ctrl";

	const char *strm0_clk = "strm0";

	const char *strm1_clk = "strm1";

	struct device *dev = &parser->pdev->dev;

	struct dss_module_power *core_power = &parser->mp[DP_CORE_PM];

	struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM];

	struct dss_module_power *core_power;

	struct dss_module_power *ctrl_power;

	struct dss_module_power *strm0_power;

	struct dss_module_power *strm1_power;



	core_power = &parser->mp[DP_CORE_PM];

	ctrl_power = &parser->mp[DP_CTRL_PM];

	strm0_power = &parser->mp[DP_STREAM0_PM];

	strm1_power = &parser->mp[DP_STREAM1_PM];



	rc =  dp_parser_init_clk_data(parser);

	if (rc) {
@@ -517,8 +570,10 @@ static int dp_parser_clock(struct dp_parser *parser) 


	core_clk_count = core_power->num_clk;

	ctrl_clk_count = ctrl_power->num_clk;

	strm0_clk_count = strm0_power->num_clk;

	strm1_clk_count = strm1_power->num_clk;



	num_clk = core_clk_count + ctrl_clk_count;

	num_clk = of_property_count_strings(dev->of_node, "clock-names");



	for (i = 0; i < num_clk; i++) {

		of_property_read_string_index(dev->of_node, "clock-names",
@@ -543,6 +598,22 @@ static int dp_parser_clock(struct dp_parser *parser) 
				clk->type = DSS_CLK_PCLK;

			else

				clk->type = DSS_CLK_AHB;

		} else if (dp_parser_check_prefix(strm0_clk, clk_name) &&

			   strm0_clk_index < strm0_clk_count) {

			struct dss_clk *clk =

				&strm0_power->clk_config[strm0_clk_index];

			strlcpy(clk->clk_name, clk_name, sizeof(clk->clk_name));

			strm0_clk_index++;



			clk->type = DSS_CLK_PCLK;

		} else if (dp_parser_check_prefix(strm1_clk, clk_name) &&

			   strm1_clk_index < strm1_clk_count) {

			struct dss_clk *clk =

				&strm1_power->clk_config[strm1_clk_index];

			strlcpy(clk->clk_name, clk_name, sizeof(clk->clk_name));

			strm1_clk_index++;



			clk->type = DSS_CLK_PCLK;

		}

	}

drivers/gpu/drm/msm/dp/dp_parser.h

+4 −0
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@ enum dp_pm_type { 
	DP_CORE_PM,

	DP_CTRL_PM,

	DP_PHY_PM,

	DP_STREAM0_PM,

	DP_STREAM1_PM,

	DP_MAX_PM

};
@@ -34,6 +36,8 @@ static inline const char *dp_parser_pm_name(enum dp_pm_type module) 
	case DP_CORE_PM:	return "DP_CORE_PM";

	case DP_CTRL_PM:	return "DP_CTRL_PM";

	case DP_PHY_PM:		return "DP_PHY_PM";

	case DP_STREAM0_PM:	return "DP_STREAM0_PM";

	case DP_STREAM1_PM:	return "DP_STREAM1_PM";

	default:		return "???";

	}

}

drivers/gpu/drm/msm/dp/dp_power.c

+70 −6
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2012-2017, The Linux Foundation. All rights reserved.

 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -24,6 +24,8 @@ struct dp_power_private { 
	struct platform_device *pdev;

	struct clk *pixel_clk_rcg;

	struct clk *pixel_parent;

	struct clk *pixel1_clk_rcg;

	struct clk *pixel1_parent;



	struct dp_power dp_power;

	struct sde_power_client *dp_core_client;
@@ -31,6 +33,8 @@ struct dp_power_private { 


	bool core_clks_on;

	bool link_clks_on;

	bool strm0_clks_on;

	bool strm1_clks_on;

};



static int dp_power_regulator_init(struct dp_power_private *power)
@@ -142,11 +146,13 @@ static int dp_power_pinctrl_set(struct dp_power_private *power, bool active) 
static int dp_power_clk_init(struct dp_power_private *power, bool enable)

{

	int rc = 0;

	struct dss_module_power *core, *ctrl;

	struct dss_module_power *core, *ctrl, *strm0, *strm1;

	struct device *dev;



	core = &power->parser->mp[DP_CORE_PM];

	ctrl = &power->parser->mp[DP_CTRL_PM];

	strm0 = &power->parser->mp[DP_STREAM0_PM];

	strm1 = &power->parser->mp[DP_STREAM1_PM];



	dev = &power->pdev->dev;
@@ -171,6 +177,20 @@ static int dp_power_clk_init(struct dp_power_private *power, bool enable) 
			goto ctrl_get_error;

		}



		rc = msm_dss_get_clk(dev, strm0->clk_config, strm0->num_clk);

		if (rc) {

			pr_err("failed to get %s clk. err=%d\n",

				dp_parser_pm_name(DP_STREAM0_PM), rc);

			goto strm0_get_error;

		}



		rc = msm_dss_get_clk(dev, strm1->clk_config, strm1->num_clk);

		if (rc) {

			pr_err("failed to get %s clk. err=%d\n",

				dp_parser_pm_name(DP_STREAM1_PM), rc);

			goto strm1_get_error;

		}



		power->pixel_clk_rcg = devm_clk_get(dev, "pixel_clk_rcg");

		if (IS_ERR(power->pixel_clk_rcg)) {

			pr_debug("Unable to get DP pixel clk RCG\n");
@@ -182,6 +202,18 @@ static int dp_power_clk_init(struct dp_power_private *power, bool enable) 
			pr_debug("Unable to get DP pixel RCG parent\n");

			power->pixel_parent = NULL;

		}



		power->pixel1_clk_rcg = devm_clk_get(dev, "pixel1_clk_rcg");

		if (IS_ERR(power->pixel1_clk_rcg)) {

			pr_debug("Unable to get DP pixel1 clk RCG\n");

			power->pixel1_clk_rcg = NULL;

		}



		power->pixel1_parent = devm_clk_get(dev, "pixel1_parent");

		if (IS_ERR(power->pixel1_parent)) {

			pr_debug("Unable to get DP pixel1 RCG parent\n");

			power->pixel1_parent = NULL;

		}

	} else {

		if (power->pixel_parent)

			devm_clk_put(dev, power->pixel_parent);
@@ -189,12 +221,24 @@ static int dp_power_clk_init(struct dp_power_private *power, bool enable) 
		if (power->pixel_clk_rcg)

			devm_clk_put(dev, power->pixel_clk_rcg);



		if (power->pixel1_parent)

			devm_clk_put(dev, power->pixel1_parent);



		if (power->pixel1_clk_rcg)

			devm_clk_put(dev, power->pixel1_clk_rcg);



		msm_dss_put_clk(ctrl->clk_config, ctrl->num_clk);

		msm_dss_put_clk(core->clk_config, core->num_clk);

		msm_dss_put_clk(strm0->clk_config, strm0->num_clk);

		msm_dss_put_clk(strm1->clk_config, strm1->num_clk);

	}



	return rc;



strm1_get_error:

	msm_dss_put_clk(strm0->clk_config, strm0->num_clk);

strm0_get_error:

	msm_dss_put_clk(ctrl->clk_config, ctrl->num_clk);

ctrl_get_error:

	msm_dss_put_clk(core->clk_config, core->num_clk);

exit:
@@ -255,7 +299,9 @@ static int dp_power_clk_enable(struct dp_power *dp_power, 


	mp = &power->parser->mp[pm_type];



	if ((pm_type != DP_CORE_PM) && (pm_type != DP_CTRL_PM)) {

	if ((pm_type != DP_CORE_PM) && (pm_type != DP_CTRL_PM) &&

			(pm_type != DP_STREAM0_PM) &&

			(pm_type != DP_STREAM1_PM)) {

		pr_err("unsupported power module: %s\n",

				dp_parser_pm_name(pm_type));

		return -EINVAL;
@@ -274,6 +320,18 @@ static int dp_power_clk_enable(struct dp_power *dp_power, 
			return 0;

		}



		if ((pm_type == DP_STREAM0_PM)

			&& (power->strm0_clks_on)) {

			pr_debug("strm0 clks already enabled\n");

			return 0;

		}



		if ((pm_type == DP_STREAM1_PM)

			&& (power->strm1_clks_on)) {

			pr_debug("strm1 clks already enabled\n");

			return 0;

		}



		if ((pm_type == DP_CTRL_PM) && (!power->core_clks_on)) {

			pr_debug("Need to enable core clks before link clks\n");
@@ -298,15 +356,21 @@ static int dp_power_clk_enable(struct dp_power *dp_power, 


	if (pm_type == DP_CORE_PM)

		power->core_clks_on = enable;

	else

	else if (pm_type == DP_CTRL_PM)

		power->link_clks_on = enable;

	else if (pm_type == DP_STREAM0_PM)

		power->strm0_clks_on = enable;

	else if (pm_type == DP_STREAM1_PM)

		power->strm1_clks_on = enable;



	pr_debug("%s clocks for %s\n",

			enable ? "enable" : "disable",

			dp_parser_pm_name(pm_type));

	pr_debug("link_clks:%s core_clks:%s\n",

	pr_debug("link_clks:%s core_clks:%s strm0_clks:%s strm1_clks:%s\n",

		power->link_clks_on ? "on" : "off",

		power->core_clks_on ? "on" : "off");

		power->core_clks_on ? "on" : "off",

		power->strm0_clks_on ? "on" : "off",

		power->strm1_clks_on ? "on" : "off");

error:

	return rc;

}