ARM: dts: msm: Update proper clock domain address for LMH DCVS for SM6150

Update correct OSM clock domain register address for LMH DCVS hardware
to get aggregated throttling request for each cluster for SM6150.

Change-Id: I383d235b1ebc4336303490fc3927374f00b50aa2
Signed-off-by: Manaf Meethalavalappu Pallikunhi <manafm@codeaurora.org>