clk: qcom: gpucc-sdm855: Update frequency table for GMU clock

GMU clock plan listed 500MHz twice with different PLL frequencies.
The graphic clock driver however alwasy uses the first one.
This change removes the second 500MHz entry which requires the
PLL to run at 1000MHz.

Change-Id: I04f45f03a970b1f7834b5372e6d300d8fc23dd26
Signed-off-by: Vicky Wallace <vwallace@codeaurora.org>