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Commit a64ad008 authored by Alberto Panizzo's avatar Alberto Panizzo Committed by Heiko Stuebner
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clk: rockchip: fix clk_i2sout parent selection bits on rk3399 



Register, shift and mask were wrong according to datasheet.

Fixes: 11551005 ("clk: rockchip: add clock controller for the RK3399")
Cc: stable@vger.kernel.org
Signed-off-by: default avatarAlberto Panizzo <alberto@amarulasolutions.com>
Signed-off-by: default avatarAnthony Brandon <anthony@amarulasolutions.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 243229b1

drivers/clk/rockchip/clk-rk3399.c

+1 −1
Original line number Diff line number Diff line
@@ -631,7 +631,7 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = { 
	MUX(0, "clk_i2sout_src", mux_i2sch_p, CLK_SET_RATE_PARENT,

			RK3399_CLKSEL_CON(31), 0, 2, MFLAGS),

	COMPOSITE_NODIV(SCLK_I2S_8CH_OUT, "clk_i2sout", mux_i2sout_p, CLK_SET_RATE_PARENT,

			RK3399_CLKSEL_CON(30), 8, 2, MFLAGS,

			RK3399_CLKSEL_CON(31), 2, 1, MFLAGS,

			RK3399_CLKGATE_CON(8), 12, GFLAGS),



	/* uart */