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Commit 243229b1 authored by Elaine Zhang's avatar Elaine Zhang Committed by Heiko Stuebner
Browse files

clk: rockchip: add clock controller for px30 



Add the clock tree definition for the new px30 SoC.

Signed-off-by: default avatarElaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent 956060a5

drivers/clk/rockchip/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ obj-y += clk-muxgrf.o 
obj-y	+= clk-ddr.o

obj-$(CONFIG_RESET_CONTROLLER)	+= softrst.o



obj-y	+= clk-px30.o

obj-y	+= clk-rv1108.o

obj-y	+= clk-rk3036.o

obj-y	+= clk-rk3128.o

drivers/clk/rockchip/clk-px30.c

0 → 100644
+1039 −0

File added.

Preview size limit exceeded, changes collapsed.

drivers/clk/rockchip/clk.h

+40 −1
Original line number Diff line number Diff line
@@ -34,7 +34,46 @@ struct clk; 
#define HIWORD_UPDATE(val, mask, shift) \

		((val) << (shift) | (mask) << ((shift) + 16))



/* register positions shared by RV1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */

/* register positions shared by PX30, RV1108, RK2928, RK3036, RK3066, RK3188 and RK3228 */

#define BOOST_PLL_H_CON(x)		((x) * 0x4)

#define BOOST_CLK_CON			0x0008

#define BOOST_BOOST_CON			0x000c

#define BOOST_SWITCH_CNT		0x0010

#define BOOST_HIGH_PERF_CNT0		0x0014

#define BOOST_HIGH_PERF_CNT1		0x0018

#define BOOST_STATIS_THRESHOLD		0x001c

#define BOOST_SHORT_SWITCH_CNT		0x0020

#define BOOST_SWITCH_THRESHOLD		0x0024

#define BOOST_FSM_STATUS		0x0028

#define BOOST_PLL_L_CON(x)		((x) * 0x4 + 0x2c)

#define BOOST_RECOVERY_MASK		0x1

#define BOOST_RECOVERY_SHIFT		1

#define BOOST_SW_CTRL_MASK		0x1

#define BOOST_SW_CTRL_SHIFT		2

#define BOOST_LOW_FREQ_EN_MASK		0x1

#define BOOST_LOW_FREQ_EN_SHIFT		3

#define BOOST_BUSY_STATE		BIT(8)



#define PX30_PLL_CON(x)			((x) * 0x4)

#define PX30_CLKSEL_CON(x)		((x) * 0x4 + 0x100)

#define PX30_CLKGATE_CON(x)		((x) * 0x4 + 0x200)

#define PX30_GLB_SRST_FST		0xb8

#define PX30_GLB_SRST_SND		0xbc

#define PX30_SOFTRST_CON(x)		((x) * 0x4 + 0x300)

#define PX30_MODE_CON			0xa0

#define PX30_MISC_CON			0xa4

#define PX30_SDMMC_CON0			0x380

#define PX30_SDMMC_CON1			0x384

#define PX30_SDIO_CON0			0x388

#define PX30_SDIO_CON1			0x38c

#define PX30_EMMC_CON0			0x390

#define PX30_EMMC_CON1			0x394



#define PX30_PMU_PLL_CON(x)		((x) * 0x4)

#define PX30_PMU_CLKSEL_CON(x)		((x) * 0x4 + 0x40)

#define PX30_PMU_CLKGATE_CON(x)		((x) * 0x4 + 0x80)

#define PX30_PMU_MODE			0x0020



#define RV1108_PLL_CON(x)		((x) * 0x4)

#define RV1108_CLKSEL_CON(x)		((x) * 0x4 + 0x60)

#define RV1108_CLKGATE_CON(x)		((x) * 0x4 + 0x120)