mmc: sdhci-msm: Use correct register for toggling FIFO write clk

Register names and offsets got updated with commits <fdc183f0>(mmc:
sdhci-msm: Update DLL reg settings per SDCC HW Guide) and <683f674c>
(mmc: host: sdhci-msm: Update the DDR_CONFIG register name) on 4.14
kernel.

Commit <7875198>(mmc: host: sdhci-msm: Toggle FIFO write clk after
MCLK ungated) was propagated cleanly from 4.9 and 4.14 but it
continues to use old names so the actual fix is not really getting
applied.

This change corrects the register name.

Change-Id: I3802cdccfa048de7b349c50f3e90eeebf42f768d
Signed-off-by: Veerabhadrarao Badiganti <vbadigan@codeaurora.org>