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Commit 95d9a313 authored by Tony Truong's avatar Tony Truong Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: add PCIe bandwidth scale table for each PCIe on sm8150 



Add CX voltage corner and rate change clock frequencie table for
each PCIe port on sm8150.

Change-Id: I9e1a2b79ebece45d51857f20e164837803261e26
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent dcd87885

arch/arm64/boot/dts/qcom/sm8150-pcie.dtsi

+6 −0
Original line number Diff line number Diff line
@@ -163,6 +163,9 @@ 
		qcom,vreg-0.9-voltage-level = <880000 880000 24000>;

		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX

						RPMH_REGULATOR_LEVEL_NOM 0>;

		qcom,bw-scale = <RPMH_REGULATOR_LEVEL_LOW_SVS 19200000

				RPMH_REGULATOR_LEVEL_LOW_SVS 19200000

				RPMH_REGULATOR_LEVEL_NOM 100000000>;



		msi-parent = <&pcie0_msi>;
@@ -483,6 +486,9 @@ 
		qcom,vreg-0.9-voltage-level = <880000 880000 24000>;

		qcom,vreg-cx-voltage-level = <RPMH_REGULATOR_LEVEL_MAX

						RPMH_REGULATOR_LEVEL_NOM 0>;

		qcom,bw-scale = <RPMH_REGULATOR_LEVEL_LOW_SVS 19200000

				RPMH_REGULATOR_LEVEL_LOW_SVS 19200000

				RPMH_REGULATOR_LEVEL_NOM 100000000>;



		msi-parent = <&pcie1_msi>;