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Commit 8f5dacd1 authored by Deepak Katragadda's avatar Deepak Katragadda
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clk: qcom: clk-alpha-pll: Do not poll LOCK_DET bit while PLL is disabled



When a set_rate request comes in for the Regera PLL type today,
on writing to the PLL L_VAL and ALPHA_VAL registers, we check
for the PLL_LOCK_DET bit to be asserted. This is not a valid
check when the PLL is disabled. Return early in that case.

Change-Id: Ib61f5376dc5e6d8b1dd2e415916984cb1f96b88e
Signed-off-by: default avatarDeepak Katragadda <dkatraga@codeaurora.org>
parent 8aa0accf
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