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Commit 8d977093 authored by Gregory CLEMENT's avatar Gregory CLEMENT
Browse files

ARM: dts: armada-370: Fixup pcie DT warnings



PCIe has a ranges property, so the unit name should contain an address.
Take the opportunity to use the node label instead of the full name.

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
parent 007d05d8
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+19 −18
Original line number Diff line number Diff line
@@ -170,24 +170,6 @@
				};
			};
		};

		pcie-controller {
			status = "okay";
			/*
			 * The two PCIe units are accessible through
			 * both standard PCIe slots and mini-PCIe
			 * slots on the board.
			 */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};
	};

	sound {
@@ -248,6 +230,25 @@
		compatible = "linux,spdif-dir";
	};
};

&pciec {
	status = "okay";
	/*
	 * The two PCIe units are accessible through
	 * both standard PCIe slots and mini-PCIe
	 * slots on the board.
	 */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
+14 −14
Original line number Diff line number Diff line
@@ -72,20 +72,6 @@
			MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		pcie-controller {
			status = "okay";

			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {
			sata@a0000 {
				nr-ports = <2>;
@@ -262,6 +248,20 @@
	};
};

&pciec {
	status = "okay";

	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&pinctrl {
	sata_l_white_pin: sata-l-white-pin {
		marvell,pins = "mpp57";
+16 −16
Original line number Diff line number Diff line
@@ -64,22 +64,6 @@
			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		pcie-controller {
			status = "okay";

			/* Internal mini-PCIe connector */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/* Connected on the PCB to a USB 3.0 XHCI controller */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {
			serial@12000 {
				status = "okay";
@@ -186,6 +170,22 @@
	};
};

&pciec {
	status = "okay";

	/* Internal mini-PCIe connector */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	/* Connected on the PCB to a USB 3.0 XHCI controller */
	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
+16 −16
Original line number Diff line number Diff line
@@ -66,22 +66,6 @@
			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		pcie-controller {
			status = "okay";

			/* Connected to Marvell 88SE9170 SATA controller */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/* Connected to FL1009 USB 3.0 controller */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {

			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@@ -252,6 +236,22 @@
	};
};

&pciec {
	status = "okay";

	/* Connected to Marvell 88SE9170 SATA controller */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	/* Connected to FL1009 USB 3.0 controller */
	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
+16 −16
Original line number Diff line number Diff line
@@ -66,22 +66,6 @@
			  MBUS_ID(0x01, 0xe0) 0 0xfff00000 0x100000
			  MBUS_ID(0x09, 0x01) 0 0xf1100000 0x10000>;

		pcie-controller {
			status = "okay";

			/* Connected to FL1009 USB 3.0 controller */
			pcie@1,0 {
				/* Port 0, Lane 0 */
				status = "okay";
			};

			/* Connected to Marvell 88SE9215 SATA controller */
			pcie@2,0 {
				/* Port 1, Lane 0 */
				status = "okay";
			};
		};

		internal-regs {

			/* RTC is provided by Intersil ISL12057 I2C RTC chip */
@@ -270,6 +254,22 @@
	};
};

&pciec {
	status = "okay";

	/* Connected to FL1009 USB 3.0 controller */
	pcie@1,0 {
		/* Port 0, Lane 0 */
		status = "okay";
	};

	/* Connected to Marvell 88SE9215 SATA controller */
	pcie@2,0 {
		/* Port 1, Lane 0 */
		status = "okay";
	};
};

&mdio {
	pinctrl-0 = <&mdio_pins>;
	pinctrl-names = "default";
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