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Commit 8cb6469b authored by Jeyaprakash Soundrapandian's avatar Jeyaprakash Soundrapandian Committed by Gerrit - the friendly Code Review server
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Merge changes Idae162c2,I00e2ad22 into dev/msm-4.14-camx 

* changes:
  msm: camera: icp: Send only required core info as part of PC
  ARM: dts: msm: Enable IPE/BPS PC for SM8150
parents 9c3924cd 419ed294

arch/arm64/boot/dts/qcom/sm8150-camera.dtsi

+1 −0
Original line number Original line Diff line number Diff line
@@ -983,6 +983,7 @@ 
		num-ipe = <2>;

		num-ipe = <2>;

		num-bps = <1>;

		num-bps = <1>;

		icp_pc_en;

		icp_pc_en;

		ipe_bps_pc_en;

		status = "ok";

		status = "ok";

	};

	};

drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c

+12 −18
Original line number Original line Diff line number Diff line
@@ -1088,6 +1088,7 @@ static int cam_icp_mgr_ipe_bps_resume(struct cam_icp_hw_mgr *hw_mgr, 
	struct cam_hw_intf *ipe0_dev_intf = NULL;

	struct cam_hw_intf *ipe0_dev_intf = NULL;

	struct cam_hw_intf *ipe1_dev_intf = NULL;

	struct cam_hw_intf *ipe1_dev_intf = NULL;

	struct cam_hw_intf *bps_dev_intf = NULL;

	struct cam_hw_intf *bps_dev_intf = NULL;

	uint32_t core_info_mask = 0;

	int rc = 0;

	int rc = 0;





	ipe0_dev_intf = hw_mgr->ipe0_dev_intf;

	ipe0_dev_intf = hw_mgr->ipe0_dev_intf;
@@ -1111,8 +1112,8 @@ static int cam_icp_mgr_ipe_bps_resume(struct cam_icp_hw_mgr *hw_mgr, 
			bps_dev_intf->hw_ops.process_cmd(

			bps_dev_intf->hw_ops.process_cmd(

				bps_dev_intf->hw_priv,

				bps_dev_intf->hw_priv,

				CAM_ICP_BPS_CMD_POWER_RESUME, NULL, 0);

				CAM_ICP_BPS_CMD_POWER_RESUME, NULL, 0);

			hw_mgr->core_info = hw_mgr->core_info | ICP_PWR_CLP_BPS;

		}

		}

		core_info_mask = ICP_PWR_CLP_BPS;

	} else {

	} else {

		if (hw_mgr->ipe_ctxt_cnt++)

		if (hw_mgr->ipe_ctxt_cnt++)

			goto end;

			goto end;
@@ -1139,19 +1140,20 @@ static int cam_icp_mgr_ipe_bps_resume(struct cam_icp_hw_mgr *hw_mgr, 
			}

			}

		}

		}

		hw_mgr->ipe_clk_state = true;

		hw_mgr->ipe_clk_state = true;

		if (icp_hw_mgr.ipe_bps_pc_flag) {



			hw_mgr->core_info = hw_mgr->core_info |

		if ((icp_hw_mgr.ipe1_enable) &&

				(ICP_PWR_CLP_IPE0 | ICP_PWR_CLP_IPE1);

			(ipe1_dev_intf))

		}

			core_info_mask = (ICP_PWR_CLP_IPE0 |

				ICP_PWR_CLP_IPE1);

		else

			core_info_mask = ICP_PWR_CLP_IPE0;

	}

	}





	CAM_DBG(CAM_ICP, "core_info %X",  hw_mgr->core_info);

	CAM_DBG(CAM_ICP, "core_info %X", core_info_mask);

	if (icp_hw_mgr.ipe_bps_pc_flag)

	if (icp_hw_mgr.ipe_bps_pc_flag)

		rc = hfi_enable_ipe_bps_pc(true, hw_mgr->core_info);

		rc = hfi_enable_ipe_bps_pc(true, core_info_mask);

	else if (icp_hw_mgr.icp_pc_flag)

		rc = hfi_enable_ipe_bps_pc(false, hw_mgr->core_info);

	else

	else

		rc = hfi_enable_ipe_bps_pc(false, hw_mgr->core_info);

		rc = hfi_enable_ipe_bps_pc(false, core_info_mask);

end:

end:

	return rc;

	return rc;

}

}
@@ -1192,8 +1194,6 @@ static int cam_icp_mgr_ipe_bps_power_collapse(struct cam_icp_hw_mgr *hw_mgr, 
				bps_dev_intf->hw_priv,

				bps_dev_intf->hw_priv,

				CAM_ICP_BPS_CMD_POWER_COLLAPSE,

				CAM_ICP_BPS_CMD_POWER_COLLAPSE,

				NULL, 0);

				NULL, 0);

			hw_mgr->core_info =

				hw_mgr->core_info & (~ICP_PWR_CLP_BPS);

		}

		}





		if (hw_mgr->bps_clk_state) {

		if (hw_mgr->bps_clk_state) {
@@ -1235,14 +1235,8 @@ static int cam_icp_mgr_ipe_bps_power_collapse(struct cam_icp_hw_mgr *hw_mgr, 
		}

		}





		hw_mgr->ipe_clk_state = false;

		hw_mgr->ipe_clk_state = false;

		if (icp_hw_mgr.ipe_bps_pc_flag &&

			!atomic_read(&hw_mgr->recovery)) {

			hw_mgr->core_info = hw_mgr->core_info &

				(~(ICP_PWR_CLP_IPE0 | ICP_PWR_CLP_IPE1));

		}

	}

	}





	CAM_DBG(CAM_ICP, "Exit: core_info = %x", hw_mgr->core_info);

end:

end:

	return rc;

	return rc;

}

}

drivers/media/platform/msm/camera/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h

+0 −2
Original line number Original line Diff line number Diff line
@@ -304,7 +304,6 @@ struct cam_icp_clk_info { 
 * @ipe0_enable: Flag for IPE0

 * @ipe0_enable: Flag for IPE0

 * @ipe1_enable: Flag for IPE1

 * @ipe1_enable: Flag for IPE1

 * @bps_enable: Flag for BPS

 * @bps_enable: Flag for BPS

 * @core_info: 32 bit value , tells IPE0/1 and BPS

 * @a5_dev_intf : Device interface for A5

 * @a5_dev_intf : Device interface for A5

 * @ipe0_dev_intf: Device interface for IPE0

 * @ipe0_dev_intf: Device interface for IPE0

 * @ipe1_dev_intf: Device interface for IPE1

 * @ipe1_dev_intf: Device interface for IPE1
@@ -354,7 +353,6 @@ struct cam_icp_hw_mgr { 
	bool ipe0_enable;

	bool ipe0_enable;

	bool ipe1_enable;

	bool ipe1_enable;

	bool bps_enable;

	bool bps_enable;

	uint32_t core_info;

	struct cam_hw_intf *a5_dev_intf;

	struct cam_hw_intf *a5_dev_intf;

	struct cam_hw_intf *ipe0_dev_intf;

	struct cam_hw_intf *ipe0_dev_intf;

	struct cam_hw_intf *ipe1_dev_intf;

	struct cam_hw_intf *ipe1_dev_intf;