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Commit 846ccdf2 authored by Veera Vegivada's avatar Veera Vegivada Committed by Gerrit - the friendly Code Review server
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Revert "ARM: dts: msm: Add scc plls as fixed clocks for sm8150" 



In SA8155, SSC Q6 is not enabled yet.
This reverts commit 2ea871ff.

Change-Id: Ie7f10cb414669dcd2ff70a520e09b36b71b72ccf
Signed-off-by: default avatarVeera Vegivada <vvegivad@codeaurora.org>
parent b138f139

arch/arm64/boot/dts/qcom/sm8150-v2.dtsi

+0 −4
Original line number Diff line number Diff line
@@ -86,10 +86,6 @@ 
	compatible = "qcom,npucc-sm8150-v2", "syscon";

};



&scc_pll {

	clock-frequency = <576000000>;

};



&clock_scc {

	compatible = "qcom,scc-sm8150-v2";

};

arch/arm64/boot/dts/qcom/sm8150.dtsi

+0 −18
Original line number Diff line number Diff line
@@ -1000,24 +1000,6 @@ 
		};

	};



	clocks {

		scc_pll: scc_pll {

			compatible = "fixed-clock";

			clock-frequency = <600000000>;

			clock-output-names = "scc_pll";

			#clock-cells = <0>;

		};



		scc_pll_out_even: scc_pll_out_even {

			compatible = "fixed-factor-clock";

			clock-output-names = "scc_pll_out_even";

			clocks = <&scc_pll>;

			clock-mult = <1>;

			clock-div = <2>;

			#clock-cells = <0>;

		};

	};



	llcc_pmu: llcc-pmu@90cc000 {

		compatible = "qcom,qcom-llcc-pmu";

		reg = <0x090cc000 0x300>;