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Commit 7c2ec568 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: Update mdss_ahb_clk clock divider for SM6150"

parents 3a81d2ce 42c8fada

drivers/clk/qcom/dispcc-sm6150.c

+4 −2
Original line number Diff line number Diff line
@@ -160,8 +160,8 @@ static struct clk_alpha_pll disp_cc_pll0_out_main = { 


static const struct freq_tbl ftbl_disp_cc_mdss_ahb_clk_src[] = {

	F(19200000, P_BI_TCXO, 1, 0, 0),

	F(37500000, P_GPLL0_OUT_MAIN, 16, 0, 0),

	F(75000000, P_GPLL0_OUT_MAIN, 8, 0, 0),

	F(37500000, P_GPLL0_OUT_MAIN, 8, 0, 0),

	F(75000000, P_GPLL0_OUT_MAIN, 4, 0, 0),

	{ }

};
@@ -171,10 +171,12 @@ static struct clk_rcg2 disp_cc_mdss_ahb_clk_src = { 
	.hid_width = 5,

	.parent_map = disp_cc_parent_map_4,

	.freq_tbl = ftbl_disp_cc_mdss_ahb_clk_src,

	.enable_safe_config = true,

	.clkr.hw.init = &(struct clk_init_data){

		.name = "disp_cc_mdss_ahb_clk_src",

		.parent_names = disp_cc_parent_names_4,

		.num_parents = 3,

		.flags = CLK_SET_RATE_PARENT,

		.ops = &clk_rcg2_ops,

		.vdd_class = &vdd_cx,

		.num_rate_max = VDD_NUM,

drivers/clk/qcom/gcc-sm6150.c

+2 −2
Original line number Diff line number Diff line
@@ -3424,6 +3424,8 @@ static const struct qcom_reset_map gcc_sm6150_resets[] = { 
	[GCC_PCIE_PHY_COM_BCR] = { 0x6f010 },

	[GCC_UFS_PHY_BCR] = { 0x77000 },

	[GCC_USB20_SEC_BCR] = { 0xa6000 },

	[GCC_USB3_DP_PHY_PRIM_SP0_BCR] = { 0x50010 },

	[GCC_USB3PHY_PHY_PRIM_SP0_BCR] = { 0x50008 },

};



static struct clk_dfs gcc_dfs_clocks[] = {
@@ -3501,10 +3503,8 @@ static int gcc_sm6150_probe(struct platform_device *pdev) 
	 * Disable the GPLL0 active input to MM blocks and GPU

	 * via MISC registers.

	 */

	regmap_update_bits(regmap, GCC_DISPLAY_MISC, 0x1, 0x1);

	regmap_update_bits(regmap, GCC_CAMERA_MISC, 0x1, 0x1);

	regmap_update_bits(regmap, GCC_VIDEO_MISC, 0x1, 0x1);

	regmap_update_bits(regmap, GCC_GPU_MISC, 0x3, 0x3);



	ret = qcom_cc_really_probe(pdev, &gcc_sm6150_desc, regmap);

	if (ret) {

include/dt-bindings/clock/qcom,gcc-sm6150.h

+2 −0
Original line number Diff line number Diff line
@@ -204,5 +204,7 @@ 
#define GCC_PCIE_PHY_COM_BCR			9

#define GCC_UFS_PHY_BCR				10

#define GCC_USB20_SEC_BCR			11

#define GCC_USB3_DP_PHY_PRIM_SP0_BCR		12

#define GCC_USB3PHY_PHY_PRIM_SP0_BCR		13



#endif