Loading arch/arm64/boot/dts/qcom/sm8150-qupv3.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -396,7 +396,7 @@ /* Debug UART Instance for CDP/MTP platform */ qupv3_se12_2uart: qcom,qup_uart@0xa90000 { compatible = "qcom,msm-geni-console", "qcom,msm-geni-uart"; compatible = "qcom,msm-geni-console"; reg = <0xa90000 0x4000>; reg-names = "se_phys"; clock-names = "se-clk", "m-ahb", "s-ahb"; Loading @@ -413,7 +413,7 @@ /* 4-wire UART */ qupv3_se13_4uart: qcom,qup_uart@0xc8c000 { compatible = "qcom,msm-geni-serial-hs", "qcom,msm-geni-uart"; compatible = "qcom,msm-geni-serial-hs"; reg = <0xc8c000 0x4000>; reg-names = "se_phys"; clock-names = "se-clk", "m-ahb", "s-ahb"; Loading Loading
arch/arm64/boot/dts/qcom/sm8150-qupv3.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -396,7 +396,7 @@ /* Debug UART Instance for CDP/MTP platform */ qupv3_se12_2uart: qcom,qup_uart@0xa90000 { compatible = "qcom,msm-geni-console", "qcom,msm-geni-uart"; compatible = "qcom,msm-geni-console"; reg = <0xa90000 0x4000>; reg-names = "se_phys"; clock-names = "se-clk", "m-ahb", "s-ahb"; Loading @@ -413,7 +413,7 @@ /* 4-wire UART */ qupv3_se13_4uart: qcom,qup_uart@0xc8c000 { compatible = "qcom,msm-geni-serial-hs", "qcom,msm-geni-uart"; compatible = "qcom,msm-geni-serial-hs"; reg = <0xc8c000 0x4000>; reg-names = "se_phys"; clock-names = "se-clk", "m-ahb", "s-ahb"; Loading