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Commit 783862fb authored by Ray Zhang's avatar Ray Zhang
Browse files

Revert "drm/msm/sde: trigger frame done if ctl is idle" 



This reverts commit d2288839.

Change-Id: I66f6f38621cdaa0835d4effe9e4dea2dd3fbefe1
Signed-off-by: default avatarRay Zhang <rayz@codeaurora.org>
parent bfaa231d

drivers/gpu/drm/msm/sde/sde_encoder_phys_cmd.c

+0 −14
Original line number Diff line number Diff line
@@ -1427,13 +1427,11 @@ static int _sde_encoder_phys_cmd_wait_for_ctl_start( 
	struct sde_encoder_wait_info wait_info;

	int ret;

	bool frame_pending = true;

	struct sde_hw_ctl *ctl;



	if (!phys_enc || !phys_enc->hw_ctl) {

		SDE_ERROR("invalid argument(s)\n");

		return -EINVAL;

	}

	ctl = phys_enc->hw_ctl;



	wait_info.wq = &phys_enc->pending_kickoff_wq;

	wait_info.atomic_cnt = &phys_enc->pending_ctlstart_cnt;
@@ -1476,18 +1474,6 @@ static int _sde_encoder_phys_cmd_wait_for_ctl_start( 
			atomic_inc_return(&phys_enc->ctlstart_timeout);

		}



	} else if ((ret == 0) &&

	  (phys_enc->frame_trigger_mode == FRAME_DONE_WAIT_POSTED_START) &&

	  atomic_read(&phys_enc->pending_kickoff_cnt) &&

	  ctl->ops.get_scheduler_status &&

	  (ctl->ops.get_scheduler_status(ctl) & BIT(0)) &&

	  phys_enc->parent_ops.handle_frame_done) {

		atomic_add_unless(&phys_enc->pending_kickoff_cnt, -1, 0);



		phys_enc->parent_ops.handle_frame_done(

				phys_enc->parent, phys_enc,

				SDE_ENCODER_FRAME_EVENT_DONE |

				SDE_ENCODER_FRAME_EVENT_SIGNAL_RELEASE_FENCE);

	}



	return ret;

drivers/gpu/drm/msm/sde/sde_hw_ctl.c

+0 −9
Original line number Diff line number Diff line
@@ -31,7 +31,6 @@ 
#define   CTL_PREPARE                   0x0d0

#define   CTL_SW_RESET                  0x030

#define   CTL_SW_RESET_OVERRIDE         0x060

#define   CTL_STATUS                    0x064

#define   CTL_LAYER_EXTN_OFFSET         0x40

#define   CTL_ROT_TOP                   0x0C0

#define   CTL_ROT_FLUSH                 0x0C4
@@ -710,13 +709,6 @@ static u32 sde_hw_ctl_get_reset_status(struct sde_hw_ctl *ctx) 
	return (u32)SDE_REG_READ(&ctx->hw, CTL_SW_RESET);

}



static u32 sde_hw_ctl_get_scheduler_status(struct sde_hw_ctl *ctx)

{

	if (!ctx)

		return 0;

	return (u32)SDE_REG_READ(&ctx->hw, CTL_STATUS);

}



static int sde_hw_ctl_reset_control(struct sde_hw_ctl *ctx)

{

	struct sde_hw_blk_reg_map *c;
@@ -1281,7 +1273,6 @@ static void _setup_ctl_ops(struct sde_hw_ctl_ops *ops, 
			sde_hw_ctl_update_bitmask_periph_v1;

		ops->get_ctl_intf = sde_hw_ctl_get_intf_v1;

		ops->reset_post_disable = sde_hw_ctl_reset_post_disable;

		ops->get_scheduler_status = sde_hw_ctl_get_scheduler_status;

	} else {

		ops->update_pending_flush = sde_hw_ctl_update_pending_flush;

		ops->trigger_flush = sde_hw_ctl_trigger_flush;

drivers/gpu/drm/msm/sde/sde_hw_ctl.h

+0 −7
Original line number Diff line number Diff line
@@ -296,13 +296,6 @@ struct sde_hw_ctl_ops { 
	 */

	u32 (*get_reset)(struct sde_hw_ctl *ctx);



	/**

	 * get_scheduler_reset - check ctl scheduler status bit

	 * @ctx    : ctl path ctx pointer

	 * Returns: current value of ctl scheduler and idle status

	 */

	u32 (*get_scheduler_status)(struct sde_hw_ctl *ctx);



	/**

	 * hard_reset - force reset on ctl_path

	 * @ctx    : ctl path ctx pointer