Loading drivers/pinctrl/qcom/pinctrl-sm6150.c +19 −2 Original line number Diff line number Diff line Loading @@ -28,6 +28,10 @@ #define SOUTH 0x00D00000 #define WEST 0x00500000 #define EAST 0x00100000 #define SOUTH_PDC_OFFSET 0xa2000 #define WEST_PDC_OFFSET 0xa6000 #define EAST_PDC_OFFSET 0x9f000 #define NUM_TILES 3 #define DUMMY 0x0 #define REG_SIZE 0x1000 #define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ Loading @@ -53,8 +57,9 @@ .intr_cfg_reg = base + 0x8 + REG_SIZE * id, \ .intr_status_reg = base + 0xc + REG_SIZE * id, \ .intr_target_reg = base + 0x8 + REG_SIZE * id, \ .dir_conn_reg = (base == EAST) ? base + 0x9f000 : \ ((base == WEST) ? base + 0xa6000 : base + 0xa2000), \ .dir_conn_reg = (base == EAST) ? base + EAST_PDC_OFFSET : \ ((base == WEST) ? base + WEST_PDC_OFFSET : \ base + SOUTH_PDC_OFFSET), \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ Loading Loading @@ -1642,6 +1647,14 @@ static struct msm_dir_conn sm6150_dir_conn[] = { {-1, 209}, }; #ifdef CONFIG_HIBERNATION static u32 tile_dir_conn_addr[NUM_TILES] = { [0] = SOUTH + SOUTH_PDC_OFFSET, [1] = WEST + WEST_PDC_OFFSET, [2] = EAST + EAST_PDC_OFFSET }; #endif static struct msm_pinctrl_soc_data sm6150_pinctrl = { .pins = sm6150_pins, .npins = ARRAY_SIZE(sm6150_pins), Loading @@ -1653,6 +1666,10 @@ static struct msm_pinctrl_soc_data sm6150_pinctrl = { .dir_conn = sm6150_dir_conn, .n_dir_conns = ARRAY_SIZE(sm6150_dir_conn), .dir_conn_irq_base = 216, #ifdef CONFIG_HIBERNATION .dir_conn_addr = tile_dir_conn_addr, .tile_count = ARRAY_SIZE(tile_dir_conn_addr), #endif }; static int sm6150_pinctrl_dir_conn_probe(struct platform_device *pdev) Loading Loading
drivers/pinctrl/qcom/pinctrl-sm6150.c +19 −2 Original line number Diff line number Diff line Loading @@ -28,6 +28,10 @@ #define SOUTH 0x00D00000 #define WEST 0x00500000 #define EAST 0x00100000 #define SOUTH_PDC_OFFSET 0xa2000 #define WEST_PDC_OFFSET 0xa6000 #define EAST_PDC_OFFSET 0x9f000 #define NUM_TILES 3 #define DUMMY 0x0 #define REG_SIZE 0x1000 #define PINGROUP(id, base, f1, f2, f3, f4, f5, f6, f7, f8, f9) \ Loading @@ -53,8 +57,9 @@ .intr_cfg_reg = base + 0x8 + REG_SIZE * id, \ .intr_status_reg = base + 0xc + REG_SIZE * id, \ .intr_target_reg = base + 0x8 + REG_SIZE * id, \ .dir_conn_reg = (base == EAST) ? base + 0x9f000 : \ ((base == WEST) ? base + 0xa6000 : base + 0xa2000), \ .dir_conn_reg = (base == EAST) ? base + EAST_PDC_OFFSET : \ ((base == WEST) ? base + WEST_PDC_OFFSET : \ base + SOUTH_PDC_OFFSET), \ .mux_bit = 2, \ .pull_bit = 0, \ .drv_bit = 6, \ Loading Loading @@ -1642,6 +1647,14 @@ static struct msm_dir_conn sm6150_dir_conn[] = { {-1, 209}, }; #ifdef CONFIG_HIBERNATION static u32 tile_dir_conn_addr[NUM_TILES] = { [0] = SOUTH + SOUTH_PDC_OFFSET, [1] = WEST + WEST_PDC_OFFSET, [2] = EAST + EAST_PDC_OFFSET }; #endif static struct msm_pinctrl_soc_data sm6150_pinctrl = { .pins = sm6150_pins, .npins = ARRAY_SIZE(sm6150_pins), Loading @@ -1653,6 +1666,10 @@ static struct msm_pinctrl_soc_data sm6150_pinctrl = { .dir_conn = sm6150_dir_conn, .n_dir_conns = ARRAY_SIZE(sm6150_dir_conn), .dir_conn_irq_base = 216, #ifdef CONFIG_HIBERNATION .dir_conn_addr = tile_dir_conn_addr, .tile_count = ARRAY_SIZE(tile_dir_conn_addr), #endif }; static int sm6150_pinctrl_dir_conn_probe(struct platform_device *pdev) Loading