clk: qcom: Clear hardware clock control bit of RCG

There could be few clock sources with only one scaling frequency
and after clock driver probe their rate is equal to supported
frequency level. Due to this rcg2_set_rate() would not get
called by the clock framework set_rate call and HW_CLK_CTRL bit
of RCG remains set only. In order to software control the RCG,
HW_CLK_CTRL bit needs to be cleared explicitly so add support
for the same by adding rcg2_prepare().

Change-Id: Ib19831758d54f14573f18e1916ced128d6db0cbb
Signed-off-by: Amit Nischal <anischal@codeaurora.org>