drm/msm/sde: Don't clear dim layers when there aren't any applied

Clearing dim layers indiscriminately for each blend stage on each commit
wastes a lot of CPU time since the clearing process is heavy on register
accesses. We can optimize this by only clearing dim layers when they're
actually set, and only clearing them on a per-stage basis at that. This
reduces display commit latency considerably.

Signed-off-by: Sultan Alsawaf <sultan@kerneltoast.com>
Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>