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Commit 6e0f03f6 authored by Sandeep Panda's avatar Sandeep Panda Committed by Shashank Babu Chinta Venkata
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drm/msm/dsi-staging: fix ulps during suspend for video mode 



Currently DSI driver is only considering command mode panel
for getting the number of data lanes enabled, while waiting
for lanes to be idle. So in video mode the wait is failing
because of mismatch in number of data lanes. Also when
coming out of ulps in suspend we should not configure the
DSI controller twice, which may put DSI HW in bad state.
This change fixes the same for ulps during suspend feature.

Change-Id: I090e7d726759a8317dee7941c1067207c986b98b
Signed-off-by: default avatarShashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: default avatarSandeep Panda <spanda@codeaurora.org>
parent b5ac4d66

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.c

+27 −5
Original line number Diff line number Diff line
@@ -1442,7 +1442,6 @@ static int dsi_enable_ulps(struct dsi_ctrl *dsi_ctrl) 
	u32 lanes = 0;

	u32 ulps_lanes;



	if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE)

	lanes = dsi_ctrl->host_config.common_config.data_lanes;



	rc = dsi_ctrl->hw.ops.wait_for_lane_idle(&dsi_ctrl->hw, lanes);
@@ -1484,9 +1483,7 @@ static int dsi_disable_ulps(struct dsi_ctrl *dsi_ctrl) 
		return 0;

	}



	if (dsi_ctrl->host_config.panel_mode == DSI_OP_CMD_MODE)

	lanes = dsi_ctrl->host_config.common_config.data_lanes;



	lanes |= DSI_CLOCK_LANE;



	ulps_lanes = dsi_ctrl->hw.ops.ulps_ops.get_lanes_in_ulps(&dsi_ctrl->hw);
@@ -2462,6 +2459,31 @@ int dsi_ctrl_host_timing_update(struct dsi_ctrl *dsi_ctrl) 
	return 0;

}



/**

 * dsi_ctrl_update_host_init_state() - Update the host initialization state.

 * @dsi_ctrl:        DSI controller handle.

 * @enable:        boolean signifying host state.

 *

 * Update the host initialization status only while exiting from ulps during

 * suspend state.

 *

 * Return: error code.

 */

int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool enable)

{

	int rc = 0;

	u32 state = enable ? 0x1 : 0x0;



	rc = dsi_ctrl_check_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state);

	if (rc) {

		pr_err("[DSI_%d] Controller state check failed, rc=%d\n",

		       dsi_ctrl->cell_index, rc);

		return rc;

	}

	dsi_ctrl_update_state(dsi_ctrl, DSI_CTRL_OP_HOST_INIT, state);

	return rc;

}



/**

 * dsi_ctrl_host_init() - Initialize DSI host hardware.

 * @dsi_ctrl:        DSI controller handle.

drivers/gpu/drm/msm/dsi-staging/dsi_ctrl.h

+4 −0
Original line number Diff line number Diff line
@@ -753,5 +753,9 @@ int dsi_ctrl_get_host_engine_init_state(struct dsi_ctrl *dsi_ctrl, 
 * @dsi_ctrl:                     DSI controller handle.

 */

int dsi_ctrl_wait_for_cmd_mode_mdp_idle(struct dsi_ctrl *dsi_ctrl);

/**

 * dsi_ctrl_update_host_init_state() - Set the host initialization state

 */

int dsi_ctrl_update_host_init_state(struct dsi_ctrl *dsi_ctrl, bool en);



#endif /* _DSI_CTRL_H_ */

drivers/gpu/drm/msm/dsi-staging/dsi_display.c

+25 −9
Original line number Diff line number Diff line
@@ -2225,6 +2225,14 @@ static int dsi_display_ctrl_init(struct dsi_display *display) 
	int i;

	struct dsi_display_ctrl *ctrl;



	/* when ULPS suspend feature is enabled, we will keep the lanes in

	 * ULPS during suspend state and clamp DSI phy. Hence while resuming

	 * we will programe DSI controller as part of core clock enable.

	 * After that we should not re-configure DSI controller again here for

	 * usecases where we are resuming from ulps suspend as it might put

	 * the HW in bad state.

	 */

	if (!display->panel->ulps_suspend_enabled || !display->ulps_enabled) {

		for (i = 0 ; i < display->ctrl_count; i++) {

			ctrl = &display->ctrl[i];

			rc = dsi_ctrl_host_init(ctrl->ctrl,
@@ -2235,8 +2243,16 @@ static int dsi_display_ctrl_init(struct dsi_display *display) 
				goto error_host_deinit;

			}

		}

	} else {

		for (i = 0 ; i < display->ctrl_count; i++) {

			ctrl = &display->ctrl[i];

			rc = dsi_ctrl_update_host_init_state(ctrl->ctrl, true);

			if (rc)

				pr_debug("host init update failed rc=%d\n", rc);

		}

	}



	return 0;

	return rc;

error_host_deinit:

	for (i = i - 1; i >= 0; i--) {

		ctrl = &display->ctrl[i];

drivers/gpu/drm/msm/dsi-staging/dsi_phy.c

+2 −4
Original line number Diff line number Diff line
@@ -708,7 +708,6 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, 
	u32 lanes = 0;

	u32 ulps_lanes;



	if (config->panel_mode == DSI_OP_CMD_MODE)

	lanes = config->common_config.data_lanes;

	lanes |= DSI_CLOCK_LANE;
@@ -744,7 +743,6 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, 
{

	u32 ulps_lanes, lanes = 0;



	if (config->panel_mode == DSI_OP_CMD_MODE)

	lanes = config->common_config.data_lanes;

	lanes |= DSI_CLOCK_LANE;