drm/msm/dsi-staging: clear the error bits before unmasking

Since DSI FIFO status bits are sticky bits, ensure these
bits are cleared before unmasking the FIFO error.
Otherwise unnecessarily DSI controller will trigger error
interrupts for the stale status, the moment the error is
unmasked.

Change-Id: Iebe1d1bbffe5722857ca7adbf266b1b1e19fe4a7
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>