clk: qcom: alpha: Update steps to slew the Lucid PLL

When a set_rate request comes in for the Lucid PLL, the
poll for pll_ack_latch bit to be asserted can be bypassed
in SW programming. So adding flag SUPPORTS_NO_PLL_LATCH to
check the above condition.

Also update the bit for LUCID_PCAL_DONE to check process
calibration complete status from pll_mode register.

Change-Id: Ifc184e3620f0c24c670679d8a96ff5f599a7a4a9
Signed-off-by: Naveen Yadav <naveenky@codeaurora.org>