Loading include/dt-bindings/msm/msm-bus-ids.h +33 −33 Original line number Diff line number Diff line Loading @@ -1126,38 +1126,38 @@ #define ICBID_SLAVE_TLMM_EAST 213 #define ICBID_SLAVE_TLMM_NORTH 214 #define ICBID_SLAVE_TLMM_WEST 215 #define ICBID_SLAVE_TLMM_SOUTH 216 #define ICBID_SLAVE_TLMM_CENTER 217 #define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 218 #define ICBID_SLAVE_A2NOC_THROTTLE_CFG 219 #define ICBID_SLAVE_CDSP 220 #define ICBID_SLAVE_CDSP_SMMU_CFG 221 #define ICBID_SLAVE_LPASS_MPU_CFG 222 #define ICBID_SLAVE_CSI_PHY_CFG 223 #define ICBID_SLAVE_DDRSS_CFG 224 #define ICBID_SLAVE_DDRSS_MPU_CFG 225 #define ICBID_SLAVE_SNOC_MSS_XPU_CFG 226 #define ICBID_SLAVE_BIMC_MSS_XPU_CFG 227 #define ICBID_SLAVE_MSS_SNOC_MPU_CFG 228 #define ICBID_SLAVE_MSS 229 #define ICBID_SLAVE_SDIO 230 #define ICBID_SLAVE_QM_MPU_CFG 231 #define ICBID_SLAVE_BIMC_SNOC_PCIE 232 #define ICBID_SLAVE_BOOTIMEM 233 #define ICBID_SLAVE_CDSP_CFG 234 #define ICBID_SLAVE_WLAN_DSP_CFG 235 #define ICBID_SLAVE_GENIR_XPU_CFG 236 #define ICBID_SLAVE_BOOTIMEM_MPU 237 #define ICBID_SLAVE_CRVIRT_PCNOC 238 #define ICBID_SLAVE_WLAN_INT 239 #define ICBID_SLAVE_WLAN_MPU_CFG 240 #define ICBID_SLAVE_LPASS_AGNOC_CFG 241 #define ICBID_SLAVE_LPASS_AGNOC_XPU_CFG 242 #define ICBID_SLAVE_PLL_BIAS_CFG 243 #define ICBID_SLAVE_EMAC 244 #define ICBID_SLAVE_PCNOC_S_10 245 #define ICBID_SLAVE_PCNOC_S_11 246 #define ICBID_SLAVE_LPASS_ANOC_BIMC 247 #define ICBID_SLAVE_TLMM_SOUTH 217 #define ICBID_SLAVE_TLMM_CENTER 218 #define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 219 #define ICBID_SLAVE_A2NOC_THROTTLE_CFG 220 #define ICBID_SLAVE_CDSP 221 #define ICBID_SLAVE_CDSP_SMMU_CFG 222 #define ICBID_SLAVE_LPASS_MPU_CFG 223 #define ICBID_SLAVE_CSI_PHY_CFG 224 #define ICBID_SLAVE_DDRSS_CFG 225 #define ICBID_SLAVE_DDRSS_MPU_CFG 226 #define ICBID_SLAVE_SNOC_MSS_XPU_CFG 227 #define ICBID_SLAVE_BIMC_MSS_XPU_CFG 228 #define ICBID_SLAVE_MSS_SNOC_MPU_CFG 229 #define ICBID_SLAVE_MSS 230 #define ICBID_SLAVE_SDIO 231 #define ICBID_SLAVE_QM_MPU_CFG 232 #define ICBID_SLAVE_BIMC_SNOC_PCIE 233 #define ICBID_SLAVE_BOOTIMEM 234 #define ICBID_SLAVE_CDSP_CFG 235 #define ICBID_SLAVE_WLAN_DSP_CFG 236 #define ICBID_SLAVE_GENIR_XPU_CFG 237 #define ICBID_SLAVE_BOOTIMEM_MPU 238 #define ICBID_SLAVE_CRVIRT_PCNOC 239 #define ICBID_SLAVE_WLAN_INT 240 #define ICBID_SLAVE_WLAN_MPU_CFG 241 #define ICBID_SLAVE_LPASS_AGNOC_CFG 242 #define ICBID_SLAVE_LPASS_AGNOC_XPU_CFG 243 #define ICBID_SLAVE_PLL_BIAS_CFG 244 #define ICBID_SLAVE_EMAC 245 #define ICBID_SLAVE_PCNOC_S_10 246 #define ICBID_SLAVE_PCNOC_S_11 247 #define ICBID_SLAVE_LPASS_ANOC_BIMC 248 #define ICBID_SLAVE_SNOC_BIMC_NRT 259 #define ICBID_SLAVE_SNOC_BIMC_RT 260 #define ICBID_SLAVE_QUP_0 261 Loading @@ -1168,7 +1168,7 @@ #define ICBID_SLAVE_GPU_CDSP_BIMC 266 #define ICBID_SLAVE_AHB2PHY_CSI 267 #define ICBID_SLAVE_AHB2PHY_USB 268 #define CBID_SLAVE_AHB2PHY_VREF 269 #define ICBID_SLAVE_AHB2PHY_VREF 269 #define ICBID_SLAVE_APSS_THROTTLE_CFG 270 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 271 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 272 Loading Loading
include/dt-bindings/msm/msm-bus-ids.h +33 −33 Original line number Diff line number Diff line Loading @@ -1126,38 +1126,38 @@ #define ICBID_SLAVE_TLMM_EAST 213 #define ICBID_SLAVE_TLMM_NORTH 214 #define ICBID_SLAVE_TLMM_WEST 215 #define ICBID_SLAVE_TLMM_SOUTH 216 #define ICBID_SLAVE_TLMM_CENTER 217 #define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 218 #define ICBID_SLAVE_A2NOC_THROTTLE_CFG 219 #define ICBID_SLAVE_CDSP 220 #define ICBID_SLAVE_CDSP_SMMU_CFG 221 #define ICBID_SLAVE_LPASS_MPU_CFG 222 #define ICBID_SLAVE_CSI_PHY_CFG 223 #define ICBID_SLAVE_DDRSS_CFG 224 #define ICBID_SLAVE_DDRSS_MPU_CFG 225 #define ICBID_SLAVE_SNOC_MSS_XPU_CFG 226 #define ICBID_SLAVE_BIMC_MSS_XPU_CFG 227 #define ICBID_SLAVE_MSS_SNOC_MPU_CFG 228 #define ICBID_SLAVE_MSS 229 #define ICBID_SLAVE_SDIO 230 #define ICBID_SLAVE_QM_MPU_CFG 231 #define ICBID_SLAVE_BIMC_SNOC_PCIE 232 #define ICBID_SLAVE_BOOTIMEM 233 #define ICBID_SLAVE_CDSP_CFG 234 #define ICBID_SLAVE_WLAN_DSP_CFG 235 #define ICBID_SLAVE_GENIR_XPU_CFG 236 #define ICBID_SLAVE_BOOTIMEM_MPU 237 #define ICBID_SLAVE_CRVIRT_PCNOC 238 #define ICBID_SLAVE_WLAN_INT 239 #define ICBID_SLAVE_WLAN_MPU_CFG 240 #define ICBID_SLAVE_LPASS_AGNOC_CFG 241 #define ICBID_SLAVE_LPASS_AGNOC_XPU_CFG 242 #define ICBID_SLAVE_PLL_BIAS_CFG 243 #define ICBID_SLAVE_EMAC 244 #define ICBID_SLAVE_PCNOC_S_10 245 #define ICBID_SLAVE_PCNOC_S_11 246 #define ICBID_SLAVE_LPASS_ANOC_BIMC 247 #define ICBID_SLAVE_TLMM_SOUTH 217 #define ICBID_SLAVE_TLMM_CENTER 218 #define ICBID_SLAVE_MSS_NAV_CE_MPU_CFG 219 #define ICBID_SLAVE_A2NOC_THROTTLE_CFG 220 #define ICBID_SLAVE_CDSP 221 #define ICBID_SLAVE_CDSP_SMMU_CFG 222 #define ICBID_SLAVE_LPASS_MPU_CFG 223 #define ICBID_SLAVE_CSI_PHY_CFG 224 #define ICBID_SLAVE_DDRSS_CFG 225 #define ICBID_SLAVE_DDRSS_MPU_CFG 226 #define ICBID_SLAVE_SNOC_MSS_XPU_CFG 227 #define ICBID_SLAVE_BIMC_MSS_XPU_CFG 228 #define ICBID_SLAVE_MSS_SNOC_MPU_CFG 229 #define ICBID_SLAVE_MSS 230 #define ICBID_SLAVE_SDIO 231 #define ICBID_SLAVE_QM_MPU_CFG 232 #define ICBID_SLAVE_BIMC_SNOC_PCIE 233 #define ICBID_SLAVE_BOOTIMEM 234 #define ICBID_SLAVE_CDSP_CFG 235 #define ICBID_SLAVE_WLAN_DSP_CFG 236 #define ICBID_SLAVE_GENIR_XPU_CFG 237 #define ICBID_SLAVE_BOOTIMEM_MPU 238 #define ICBID_SLAVE_CRVIRT_PCNOC 239 #define ICBID_SLAVE_WLAN_INT 240 #define ICBID_SLAVE_WLAN_MPU_CFG 241 #define ICBID_SLAVE_LPASS_AGNOC_CFG 242 #define ICBID_SLAVE_LPASS_AGNOC_XPU_CFG 243 #define ICBID_SLAVE_PLL_BIAS_CFG 244 #define ICBID_SLAVE_EMAC 245 #define ICBID_SLAVE_PCNOC_S_10 246 #define ICBID_SLAVE_PCNOC_S_11 247 #define ICBID_SLAVE_LPASS_ANOC_BIMC 248 #define ICBID_SLAVE_SNOC_BIMC_NRT 259 #define ICBID_SLAVE_SNOC_BIMC_RT 260 #define ICBID_SLAVE_QUP_0 261 Loading @@ -1168,7 +1168,7 @@ #define ICBID_SLAVE_GPU_CDSP_BIMC 266 #define ICBID_SLAVE_AHB2PHY_CSI 267 #define ICBID_SLAVE_AHB2PHY_USB 268 #define CBID_SLAVE_AHB2PHY_VREF 269 #define ICBID_SLAVE_AHB2PHY_VREF 269 #define ICBID_SLAVE_APSS_THROTTLE_CFG 270 #define ICBID_SLAVE_CAMERA_NRT_THROTTLE_CFG 271 #define ICBID_SLAVE_CDSP_THROTTLE_CFG 272 Loading