Loading Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt 0 → 100644 +30 −0 Original line number Diff line number Diff line NXP LPC32xx Clock Controller Required properties: - compatible: should be "nxp,lpc3220-clk" - reg: should contain clock controller registers location and length - #clock-cells: must be 1, the cell holds id of a clock provided by the clock controller - clocks: phandles of external oscillators, the list must contain one 32768 Hz oscillator and may have one optional high frequency oscillator - clock-names: list of external oscillator clock names, must contain "xtal_32k" and may have optional "xtal" Examples: /* System Control Block */ scb { compatible = "simple-bus"; ranges = <0x0 0x040004000 0x00001000>; #address-cells = <1>; #size-cells = <1>; clk: clock-controller@0 { compatible = "nxp,lpc3220-clk"; reg = <0x00 0x114>; #clock-cells = <1>; clocks = <&xtal_32k>, <&xtal>; clock-names = "xtal_32k", "xtal"; }; }; Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line NXP LPC32xx USB Clock Controller Required properties: - compatible: should be "nxp,lpc3220-usb-clk" - reg: should contain clock controller registers location and length - #clock-cells: must be 1, the cell holds id of a clock provided by the USB clock controller Examples: usb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x0 0x31020000 0x00001000>; usbclk: clock-controller@f00 { compatible = "nxp,lpc3220-usb-clk"; reg = <0xf00 0x100>; #clock-cells = <1>; }; }; drivers/clk/Kconfig +11 −0 Original line number Diff line number Diff line Loading @@ -167,6 +167,12 @@ config COMMON_CLK_KEYSTONE Supports clock drivers for Keystone based SOCs. These SOCs have local a power sleep control module that gate the clock to the IPs and PLLs. config COMMON_CLK_NXP def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) select REGMAP_MMIO if ARCH_LPC32XX ---help--- Support for clock providers on NXP platforms. config COMMON_CLK_PALMAS tristate "Clock driver for TI Palmas devices" depends on MFD_PALMAS Loading @@ -181,6 +187,11 @@ config COMMON_CLK_PWM Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. config COMMON_CLK_NXP def_bool COMMON_CLK && ARCH_LPC18XX ---help--- Support for clock providers on NXP platforms. config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help--- Loading drivers/clk/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -64,8 +64,8 @@ endif obj-$(CONFIG_PLAT_ORION) += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_ARCH_LPC18XX) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ Loading drivers/clk/nxp/Makefile +1 −0 Original line number Diff line number Diff line obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-ccu.o obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o Loading
Documentation/devicetree/bindings/clock/nxp,lpc3220-clk.txt 0 → 100644 +30 −0 Original line number Diff line number Diff line NXP LPC32xx Clock Controller Required properties: - compatible: should be "nxp,lpc3220-clk" - reg: should contain clock controller registers location and length - #clock-cells: must be 1, the cell holds id of a clock provided by the clock controller - clocks: phandles of external oscillators, the list must contain one 32768 Hz oscillator and may have one optional high frequency oscillator - clock-names: list of external oscillator clock names, must contain "xtal_32k" and may have optional "xtal" Examples: /* System Control Block */ scb { compatible = "simple-bus"; ranges = <0x0 0x040004000 0x00001000>; #address-cells = <1>; #size-cells = <1>; clk: clock-controller@0 { compatible = "nxp,lpc3220-clk"; reg = <0x00 0x114>; #clock-cells = <1>; clocks = <&xtal_32k>, <&xtal>; clock-names = "xtal_32k", "xtal"; }; };
Documentation/devicetree/bindings/clock/nxp,lpc3220-usb-clk.txt 0 → 100644 +22 −0 Original line number Diff line number Diff line NXP LPC32xx USB Clock Controller Required properties: - compatible: should be "nxp,lpc3220-usb-clk" - reg: should contain clock controller registers location and length - #clock-cells: must be 1, the cell holds id of a clock provided by the USB clock controller Examples: usb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; ranges = <0x0 0x31020000 0x00001000>; usbclk: clock-controller@f00 { compatible = "nxp,lpc3220-usb-clk"; reg = <0xf00 0x100>; #clock-cells = <1>; }; };
drivers/clk/Kconfig +11 −0 Original line number Diff line number Diff line Loading @@ -167,6 +167,12 @@ config COMMON_CLK_KEYSTONE Supports clock drivers for Keystone based SOCs. These SOCs have local a power sleep control module that gate the clock to the IPs and PLLs. config COMMON_CLK_NXP def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX) select REGMAP_MMIO if ARCH_LPC32XX ---help--- Support for clock providers on NXP platforms. config COMMON_CLK_PALMAS tristate "Clock driver for TI Palmas devices" depends on MFD_PALMAS Loading @@ -181,6 +187,11 @@ config COMMON_CLK_PWM Adapter driver so that any PWM output can be (mis)used as clock signal at 50% duty cycle. config COMMON_CLK_NXP def_bool COMMON_CLK && ARCH_LPC18XX ---help--- Support for clock providers on NXP platforms. config COMMON_CLK_PXA def_bool COMMON_CLK && ARCH_PXA ---help--- Loading
drivers/clk/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -64,8 +64,8 @@ endif obj-$(CONFIG_PLAT_ORION) += mvebu/ obj-$(CONFIG_ARCH_MESON) += meson/ obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_ARCH_LPC18XX) += nxp/ obj-$(CONFIG_MACH_PISTACHIO) += pistachio/ obj-$(CONFIG_COMMON_CLK_NXP) += nxp/ obj-$(CONFIG_COMMON_CLK_PXA) += pxa/ obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/ obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/ Loading
drivers/clk/nxp/Makefile +1 −0 Original line number Diff line number Diff line obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-ccu.o obj-$(CONFIG_ARCH_LPC32XX) += clk-lpc32xx.o