ARM: dts: msm: Enable deep pre-fetch errata workaround for sm8150

Due to the deep pre-fetch errata in MMU-500, invalid page-table
entries in the prefetch window would cause permissions may be
cached for valid entries in this window. Ensure the start and
end of all mapped buffers are aligned to 16kB boundary.

Change-Id: I0ba1843e2dbe9607b1c49cc3913b214cf4e09527
Signed-off-by: Sudarshan Rajagopalan <sudaraja@codeaurora.org>