ARM: dts: msm: Extend GFX register offset for SM6150

For GMU CX power counter enable and AO CX busy
mask, we are trying to access register offset
greater than 0x40000. Extend GPU register offset
so that GPU busy cycle gets counted for DCVS,
when GMU is in disabled state.

Change-Id: I162278442661112d01d14485eb158a4660e06f4f
Signed-off-by: Amit Kushwaha <kushwaha@codeaurora.org>