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Commit 4a18ef5b authored by Stephen Boyd's avatar Stephen Boyd
Browse files

Merge branches 'clk-qcom-rpmh', 'clk-qcom-spdx', 'clk-con-id-leak',...

Merge branches 'clk-qcom-rpmh', 'clk-qcom-spdx', 'clk-con-id-leak', 'clk-fixed-factor-populated' and 'clk-mvebu-periph-parent' into clk-next

* clk-qcom-rpmh:
  :  - Qualcomm RPMh clk driver
  clk: qcom: clk-rpmh: Add QCOM RPMh clock driver

* clk-qcom-spdx:
  :  - SPDX tagging for qcom
  clk: qcom: Update SPDX headers for common files

* clk-con-id-leak:
  :  - Stop leaking con ids in __clk_put()
  clk: core: Potentially free connection id

* clk-fixed-factor-populated:
  :  - Fix a corner case in fixed factor clk probing where node is in DT but
  :    parent clk is registered much later
  clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure

* clk-mvebu-periph-parent:
  :  - Marvell Armada 3700 clk_pm_cpu_get_parent() had an invalid return value
  clk: mvebu: armada-37xx-periph: Remove unused var num_parents
  clk: mvebu: armada-37xx-periph: Fix wrong return value in get_parent
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+8 −1
Original line number Diff line number Diff line
@@ -177,8 +177,15 @@ static struct clk *_of_fixed_factor_clk_setup(struct device_node *node)

	clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
					mult, div);
	if (IS_ERR(clk))
	if (IS_ERR(clk)) {
		/*
		 * If parent clock is not registered, registration would fail.
		 * Clear OF_POPULATED flag so that clock registration can be
		 * attempted again from probe function.
		 */
		of_node_clear_flag(node, OF_POPULATED);
		return clk;
	}

	ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
	if (ret) {
+3 −0
Original line number Diff line number Diff line
@@ -3133,6 +3133,7 @@ struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
	return clk;
}

/* keep in sync with __clk_put */
void __clk_free_clk(struct clk *clk)
{
	clk_prepare_lock();
@@ -3512,6 +3513,7 @@ int __clk_get(struct clk *clk)
	return 1;
}

/* keep in sync with __clk_free_clk */
void __clk_put(struct clk *clk)
{
	struct module *owner;
@@ -3545,6 +3547,7 @@ void __clk_put(struct clk *clk)

	module_put(owner);

	kfree_const(clk->con_id);
	kfree(clk);
}

+0 −4
Original line number Diff line number Diff line
@@ -415,7 +415,6 @@ static unsigned int armada_3700_pm_dvfs_get_cpu_parent(struct regmap *base)
static u8 clk_pm_cpu_get_parent(struct clk_hw *hw)
{
	struct clk_pm_cpu *pm_cpu = to_clk_pm_cpu(hw);
	int num_parents = clk_hw_get_num_parents(hw);
	u32 val;

	if (armada_3700_pm_dvfs_is_enabled(pm_cpu->nb_pm_base)) {
@@ -425,9 +424,6 @@ static u8 clk_pm_cpu_get_parent(struct clk_hw *hw)
		val &= pm_cpu->mask_mux;
	}

	if (val >= num_parents)
		return -EINVAL;

	return val;
}

+9 −0
Original line number Diff line number Diff line
@@ -59,6 +59,15 @@ config QCOM_CLK_SMD_RPM
	  Say Y if you want to support the clocks exposed by the RPM on
	  platforms such as apq8016, apq8084, msm8974 etc.

config QCOM_CLK_RPMH
	tristate "RPMh Clock Driver"
	depends on COMMON_CLK_QCOM && QCOM_RPMH
	help
	 RPMh manages shared resources on some Qualcomm Technologies, Inc.
	 SoCs. It accepts requests from other hardware subsystems via RSC.
	 Say Y if you want to support the clocks exposed by RPMh on
	 platforms such as SDM845.

config APQ_GCC_8084
	tristate "APQ8084 Global Clock Controller"
	select QCOM_GDSC
+1 −0
Original line number Diff line number Diff line
@@ -37,6 +37,7 @@ obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o
obj-$(CONFIG_QCOM_A53PLL) += a53-pll.o
obj-$(CONFIG_QCOM_CLK_APCS_MSM8916) += apcs-msm8916.o
obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o
obj-$(CONFIG_QCOM_CLK_RPMH) += clk-rpmh.o
obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o
obj-$(CONFIG_SDM_GCC_845) += gcc-sdm845.o
obj-$(CONFIG_SDM_VIDEOCC_845) += videocc-sdm845.o
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