drm/msm/sde: split the interrupt wait timeout in two halves
Certain module may disable interrupt for longer duration on same
CPU where display SW is scheduled to receive the interrupt.
It may also be possible that certain module disables interrupt
on all CPUs for longer duration. That causes all subsystems
to receive interrupt at same time when interrupts are enabled
again. This can be handled by splitting the wait timeout in
two halves. The first half may return late due to jiffie jump.
The second half wait allows system to process all subsystem
interrupt and avoid flagging invalid timeout in display module.
Change-Id: Ic2183b13e37bff4a4b2a363a0f8c3ac5247ab5c0
Signed-off-by:
Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
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