ARM: dts: msm: add PHY power down offset for PCIe on SM8150

To properly power down the PCIe PHY on SM8150, add
PCIe PHY power down register offset for PCIe0 and PCIe1
devicetree node. This will prevent power leakage from
the PCIe PHY.

Change-Id: Ifc3732311d0a772414db9350157bae0f4bdf107d
Signed-off-by: Tony Truong <truong@codeaurora.org>